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1/124 ? semiconductor msm6650 family ? semiconductor msm6652/53/54/55/56-xxx, msm6652a/53a/ 54a/55a/56a/ 58a-xxx, msm66p54-xx, msm66p56-xx (under development), msm6650 internal mask rom voice synthesis ic, internal one-time-programmable (otp) rom voice synthesis ic, external rom drive voice synthesis ic e2d0017-27-42 general description the msm6650 family is the successor to oki's msm6375 family. to ensure high-quality voice synthesis, the msm6650 family members offer adaptive differential pulse-code modulation (adpcm) playback, pulse-code modulation (pcm) playback, 12-bit d/a conversion, and on-chip C40 db/ octave low-pass filter (lpf). the conventional "beep" tones and 2-channel playback are now easier to use. oki has added additional functions such as melody play, fade-out, and random playback. oki has improved external control by adding an edit rom. the edit rom can be used to form sentences by linking phrases. the msm6650 family members can support a variety of applications as it can function in either standalone mode or microcontroller interface mode. in microcontroller interface mode, serial input control is available. serial input control minimizes the number of microcontroller port pins required for voice synthesis control. the msm6650 family includes an internal mask rom version, internal one-time-programmable (otp) rom version, and external rom version. the features of the msm6650 family devices are as follows. ? msm6652/53/54/55/56-xxx these devices are single-chip voice synthesizers with an on-chip mask rom using the cmos technology. standalone mode or microcontroller interface mode can be selected by mask option. ? msm6652a/53a/54a/55a/56a/58a-xxx the trial production period for these devices is shorter than those described above. these devices are suitable for developing prototype models and concept demonstration of new products. ? msm66p54-xx, msm66p56-xx the device is a single-chip cmos voice synthesizer with one-time-programmable (otp) rom. standalone and microcontroller interface modes are selected by using a code (01-04). the user can easily write voice data using the development tool ar761 or ar762, or p54 adapter. unlike the mask rom version, the otp version is suited to applications which requires a small lot production of different type devices or short delivery time. ? msm6650 the msm6650 device can directly connect external rom or eprom of up to 64 mbits, which stores voice data. this device is ideally suited to an evaluation ic for the msm6650 family because its circuit configuration is identical to those of the mask rom-based and otp version devices. this version: jan. 1998 previous version: may. 1997
2/124 ? semiconductor msm6650 family contents standalone mode features ....................................................................................................................... .................. 5 block diagrams ................................................................................................................. ........ 7 pin configuration .............................................................................................................. ... 10 pin descriptions ............................................................................................................... ....... 13 absolute maximum ratings ............................................................................................... 18 recommended operating conditions ........................................................................ 18 electrical characteristics .............................................................................................. 19 timing diagrams ................................................................................................................ ....... 21 functional description ...................................................................................................... 23 1. playback code specification .................................................................................................. ........... 23 2. internal rom usage and disabled area ..................................................................................... 23 3. pull-up/pull-down resistor ................................................................................................... ............ 23 4. option(s) .................................................................................................................... ........................................ 24 5. standalone mode .............................................................................................................. ........................ 24 6. sampling frequency ........................................................................................................... ...................... 30 7. voice playback time .......................................................................................................... ....................... 31 8. channel status ............................................................................................................... ............................ 31 9. playback method .............................................................................................................. ......................... 31 10. standby conversion .......................................................................................................... ....................... 34 11. voice output ................................................................................................................ .................................. 34 12. low-pass filter pop noise ................................................................................................... ................... 36 13. rc oscillation .............................................................................................................. ................................ 37 14. ceramic oscillation ......................................................................................................... ....................... 41 15. power supply ................................................................................................................ ................................. 42 application circuits ........................................................................................................... ... 43
3/124 ? semiconductor msm6650 family microcontroller interface mode features ....................................................................................................................... .................. 47 block diagrams ................................................................................................................. ........ 49 pin configuration .............................................................................................................. ..... 52 pin descriptions ............................................................................................................... ......... 55 absolute maximum ratings ............................................................................................... 61 recommended operating conditions ........................................................................ 61 electrical characteristics .............................................................................................. 62 timing diagrams ................................................................................................................ ....... 64 functional description ...................................................................................................... 70 1. playback code specification .................................................................................................. ........... 70 2. internal rom usage and disabled area ..................................................................................... 70 3. pull-up/pull-down resistor ................................................................................................... ............ 71 4. options ............................................................................................................................... ................................ 71 5. microcontroller interface mode ............................................................................................... .. 74 6. command data ................................................................................................................. ........................... 78 7. address data ................................................................................................................. ................................ 86 8. stop code .................................................................................................................... ...................................... 87 9. sampling frequency ........................................................................................................... ...................... 89 10. voice playback time ......................................................................................................... ........................ 89 11. channel status .............................................................................................................. ............................. 90 12. playback method ............................................................................................................. .......................... 90 13. standby conversion .......................................................................................................... ....................... 93 14. voice output ................................................................................................................ .................................. 93 15. low-pass filter pop noise ................................................................................................... ................... 95 16. ceramic oscillation ......................................................................................................... ....................... 96 17. power supply ................................................................................................................ ................................. 97 18. external rom driving timing ................................................................................................. ............ 98 application circuits ........................................................................................................... . 100 edit rom edit rom ....................................................................................................................... ................. 104 echo playback of a single phrase .............................................................................. 113 echo playback of multiple phrases .......................................................................... 116 echo playback of a single phrase within a phrase string ....................... 117
4/124 ? semiconductor msm6650 family the table below shows the major differences between the msm6650 family and the msm6375 family. msm6650 family msm6375 family interface standalone mode/microcontroller interface mode sw input/cpu input interface voice synthesis method sampling frequency (f sam ) master clock frequency (f osc ) lpf attenuation factor lpf cut-off frequency (f cut ), khz maximum phrase number pull-up/pull-down resistors standby conversion time mask options added function in edit rom 4-bit adpcm or 8-bit pcm/melody pcm 0.5, 1.0, 1.3, 2.0 khz options (16 ms to 2100 ms) eight frequencies (4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16.0, or 32.0 khz) 256 khz (rc)/4.096 mhz (ceramic/crystal) C40 db/octave 1.8 2.6 2.6 3.2 4.2 5.1 6.4 12.8 4.0 5.3 6.4 8.0 10.6 12.8 16.0 32.0 f cut f sam 127 built in 0.2 sec 4 options 4-bit adpcm 1.0 or 2.0 khz, (user-specified length, fixed at either 64, 128, 250, or 500 ms) three frequencies at two oscillator frequencies (4.0, 6.4, 8.0 khz with f osc =64 khz; 16.0, 25.6, 32.0 khz with f osc =256 khz) 40 khz to 256 khz C24 db/octave 111 3 sec 14 options edit rom fade-out random playback melody playback pcm playback serial input/port output "beep" tone frequecy (length) 1.5 3.0 3.0 4.0 6.4 8.0 f cut f sam
5/124 ? semiconductor msm6650 family standalone mode features note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? built-in random playback function ? fade-out function via four-step sound volume attenuation ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 120 phrases ? built-in 12-bit d/a converter ? built-in C40 db/octave low-pass filter ? standby function ? selectable rc or ceramic oscillation ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name: msm6652-xxxgs-k/msm6653-xxxgs-k msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-03gs-k/ msm66p54-04gs-k/msm66p56-03gs-k/ msm66p56-04gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-03rs/msm66p54-04rs/ msm66p56-03rs/msm66p56-04rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk) (product name: msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.78) (product name: msm6650ss) device name rom size maximum playback time (sec) f sam =4.0 khz f sam =6.4 khz f sam =8.0 khz f sam =16 khz msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 msm6656, 6656a 2 mbits 129.1 80.7 64.5 32.2 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 msm66p54 1 mbit 63.8 39.9 31.9 15.9 129.1 80.7 64.5 32.2 msm6658a 4 mbits 259.7 162.9 129.8 64.9 msm66p56 2 mbit 129.1 80.7 64.5 32.2
6/124 ? semiconductor msm6650 family ? option table option input interface mode standby conversion option a option b option c option d microcontroller standalone microcontroller standalone serial parallel yes no item ceramic sample mold sample mass produc- tion package (circle the desired one) quantity note 18-pin dip (ceramic) 18-pin dip (plastic) 18-pin dip (plastic) 24-pin sop (ceramic) 24-pin sop (plastic) 24-pin sop (plastic) chip chip chip pcs pcs pcs per lot monthly up to 10 samples. operating temp. : 10 to 30c up to 50 samples option list oki electric industry co., ltd. date: you are requested to develop msm665x-xxx on the following conditions. 1. options there are four options for the msm6650 family. choose and circle the desired option. 2. package and quantity signed by title : company name : *1. the options for the mask rom-based devices are mask options. the user should send oki an option list before starting development. a sample of option list is shown below. *2. a code of otp version device corresponds to one of the options. the user should specify either msm66p54-03 or msm66p54-04 or msm66p56-03 or msm66p56-04. (in this case, no option list is required.) pin name microcontroller interface mode serial input parallel input with standby no standby stby "l" "h" msm6650 serial "h" "l" "l" "l" cpu "h" "h" "l" "l" msm66p54/p56 C01 C02 C03 C04 msm6652/53/54/55/56 standalone mode mask option *2 msm6652a/53a/54a/55a/56a/58a *1
7/124 ? semiconductor msm6650 family block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx rom (containing 22-kbit edit rom & address rom) 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) address counter timing controller gnd v dd reset random circuit i/o interface osc ceramic/ crystal/rc xt/ cr a2 a1 a0 sw3 sw2 sw1 sw0 test rnd busy osc1 osc2 osc3 (msm6652/52a) (msm6653/53a) (msm6654/54a) (msm6655/55a) (msm6656/56a) (msm6658a) 288-kbit 544-kbit 1-mbit 1.5-mbit 2-mbit 4-mbit
8/124 ? semiconductor msm6650 family msm66p54/p56-xx a2 a1 a0 sw3 sw2 sw1 sw0 test rnd busy osc1 osc2 osc3 xt/ cr reset v dd gnd aout pgm v pp address & switching controller random circuit i/o interface osc (ceramic/ crystal/rc) 17-bit (msm66p54-xx) 18-bit (msm66p56-xx) multiplexer 17-bit (msm66p54-xx) 18-bit (msm66p56-xx) address counter timing controller program circuit 1-mbit otp rom (msm66p54-xx) 2-mbit otp rom (msm66p56-xx) (containing 22-kbit edit rom & address rom) data controller adpcm synthesizer pcm synthesizer melody generator beep tone generator 12- bit dac lpf 12 8 7
9/124 ? semiconductor msm6650 family msm6650 8-bit latch 23-bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 23-bit address counter timing controller dgnd dv dd reset random circuit i/o interface osc (ceramic/ crystal/rc) xt/ cr a2 a1 a0 sw3 sw2 sw1 sw0 test1 , 3 rnd ce rcs busy nar ibusy standby xt/osc1 xt /osc2 osc3 av dd agnd test2 cpu stby ra22 ra0 d7 d0
10/124 ? semiconductor msm6650 family 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 test a2 a1 a0 reset xt/ cr aout sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 msm6652-6658a ( mask rom) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc nc rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc nc reset test a2 a1 a0 busy gnd v dd msm6652-6658a ( mask rom) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 test a2 a1 a0 v pp reset busy xt/ cr aout gnd pgm sw3 sw2 sw1 sw0 rnd osc3 osc2 osc1 v dd msm66p54 / p56 (otp) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd osc1 osc2 nc osc3 nc pgm rnd sw0 sw1 sw2 sw3 gnd aout xt/ cr nc busy nc v pp reset test a2 a1 a0 msm66p54 / p56 (otp) msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-03/-04rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-03/-04rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs pin configuration (top view) the msm66p54-xx and msm66p56-xx has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54-xx/p56-xx may be open at playback after completion of writing. msm6652-xxxgs-k, msm6653-xxxgs-k, msm66p54-03/-04gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-03/-04gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k
11/124 ? semiconductor msm6650 family msm6650 product name: msm6650gs-bk 1 nc busy nar nc aout agnd dgnd av dd dv dd xt/osc1 xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 nc : no connection 64-pin plastic qfp
12/124 ? semiconductor msm6650 family nc : no connection 64-pin plastic sdip 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt /osc2 osc3 test1 rnd xt/ cr cpu test2 ibusy nc standby sw0 sw1 sw2 sw3 a0 a1 a2 test3 reset ra13 xt/osc1 dv dd av dd dgnd agnd aout nar busy nc stby ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2
13/124 ? semiconductor msm6650 family pin descriptions 1. msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip symbol type description reset osc2 osc3 reset. setting this pin to "l" puts the deveice in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. the msm6650 family devices have an internal power-on reset. to operate the power-on reset correctly, power should ramp up within 1 ms. if this is not possible, apply a reset pulse when power is turned on. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. test i test mode. set to "h" level. this pin has an internal pull-up resistor. pin 5 12 13 14 15-18 1-3 6 7 8 11 4 gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. 9 10
14/124 ? semiconductor msm6650 family symbol type description reset reset. setting this pin to "l" puts the deveice in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. the msm6650 family devices have an internal power-on reset. to operate the power-on reset correctly, power should ramp up within 1 ms. if this is not possible, apply a reset pulse when power is turned on. this pin has an internal pull-up resistor. i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. pin 6 7 8 9 osc2 osc3 o o rnd sw0-sw3 a0-a2 i i i oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. test i test mode. set to "h" level. this pin has an internal pull-up resistor. 13 14 15 16-19 2-4 12 10 11 5 v pp pgm i power supply used when writing data to internal otp rom. leave open or set to "h" level during playback. interface with voice analysis edit tool ar761 or ar762. set to "l" level or leave open during playback. 1 20 2.msm66p54-xx, msm66p56-xx 20-pin plastic dip
15/124 ? semiconductor msm6650 family 3.msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54-xx, msm66p56-xx 24-pin plastic sop symbol type description reset osc2 osc3 reset. setting this pin to "l" puts the deveice in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. the msm6650 family devices have an internal power-on reset. to operate the power-on reset correctly, power should ramp up within 1 ms. if this is not possible, apply a reset pulse when power is turned on. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. gnd ground. v dd power supply. insert a 0.1 m f or more bypass capacitor between this pin and gnd. test i test mode. set to "h" level. this pin has an internal pull-up resistor. pin 17 3 5 8 9-12 13-15 20 22 23 2 24 1 16 v pp * pgm *i power supply used when writing data to internal otp rom. leave open or set to "h" level during playback. interface with voice analysis edit tool ar761 or ar762. set to "l" level or leave open during playback. 18 7 * pins for msm66p54/56-xx only
16/124 ? semiconductor msm6650 family 4.msm6650 64-pin plastic qfp (64-pin plastic sdip) symbol type description reset xt /osc2 osc3 reset. setting this pin to "l" puts the deveice in standby status. at this time, oscillation stops, aout is pulled to gnd, and the deveice is initialized. the msm6650 family devices have an internal power-on reset. to operate the power-on reset correctly, power should ramp up within 1 ms. if this is not possible, apply a reset pulse when power is turned on. this pin has an internal pull-up resistor. i o o rnd sw0-sw3 a0-a2 i i i busy o xt/ cr i busy. this pin outputs a "l" level during playback. at power-on, this pin is at "h" level. xt/ cr selectable pin. set to "h" level when using ceramic oscillation. set to "l" level when using rc oscillation. aout o sound output. this is the synthesized output pin of the internal low-pass filter. oscillator 1. this pin is a ceramic oscillator connection pin when using ceramic oscillation. this pin is an rc connection pin when using rc oscillation. when using an external clock, use this pin as the clock input. xt/osc1 i oscillator 2. this pin is a ceramic oscillator connection pin when using a ceramic oscillator. this is an rc connection pin when using rc oscillation. leave open if using an external clock. osc2 outputs a "l" level in standby status. oscillator 3. leave open if using a ceramic oscillator. this pin is the rc connection pin when using rc oscillation. when rc oscillation is selected, osc3 outputs a "h" level in standby status. random playback. random playback starts when the rnd pin is set to a "l" level. at the fall of rnd , addresses from the random address playback circuit inside the ic are fetched. set to a "h" level if random playback is not used. this pin has an internal pull-up resistor. phrase inputs. these pins are phrase input pins corresponding to playback. if the input changes, sw0 to sw3 pins capture address data after 16 ms and speech playback commences. these pins have internal pull-down resistors. phrase inputs. phrase input pins correspoding to playback. the a0 input becomes invalid when the random playback function is used. pin 29(19) 11(1) 12(2) 14(4) 21-24 (11-14) 25-27 (15-17) 3(57) 15(5) 5 (59) 10(64)
17/124 ? semiconductor msm6650 family ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the "l" level. this pin goes high impedance when rcs is at the "h" level. cpu i cpu mode. set to "l" level to select standalone mode. set to "h" level to select microcontroller interface mode. d0-d7 i external memory data bus. data is input when rcs is low. when rcs is high, these pins become low due to internal pull-down resistors. ibusy o i busy. outputs a "l" level during voice playback (except during standby conversion time), or when the aout pin is at half v dd level. ra0-ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in "h" level. rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. addresses and ce are output when rcs is at "l" level. the ra22-ra0 address pins and ce pin become high impedance. stby i standby contorl. if set to "l" level, the msm6650 enters standby mode 0.2 seconds after voice ends. if set to "h" level, the msm6650 aout output maintains half v dd after voice ends. standby o standby indicator. this output pin remains at "l" level during oscillation. test1 , 3 i test. set these pins to "h" level. the test1 and test3 pins have internal pull-up resistor. test2 i test. set this pin to "l" level. 30 (20) 16 (6) 32, 34-40 (22, 24-30) 18 (8) 41-63 (31-40, 42-54) 31 (21) 64 (55) 20 (10) 13, 28 (3, 18) 17 (7) symbol type description agnd analog ground pin. dgnd digital ground pin. av dd analog power pin. insert a 0.1 m f or more bypass capacitor in between this pin and agnd. dv dd digiral power pin. insert a 0.1 m f or more bypass capacitor in between this pin and dgnd. pin 6 (60) 7 (61) 8 (62) 9 (63)
18/124 ? semiconductor msm6650 family absolute maximum ratings parameter symbol condition rating unit ta = 25c (gnd=0 v) v dd C0.3 to +7.0 v power supply voltage v in C0.3 to v dd +0.3 v input voltage t stg C55 to +150 c storage temperature recommended operating conditions * if rc oscillation is selected, 32khz sampling frequency cannot be selected. parameter symbol condition range unit (gnd=0 v) typ. min. max. 4.096 3.5 4.5 mhz v dd msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v msm6658a, msm66p54/p56 3.5 to 5.5 v t op operating temperature C40 to +85 c f osc1 master clock frequency 1 when crystal selected f osc2 master clock frequency 2 when rc selected (*) khz 256 200 300 power supply voltage v dd
19/124 ? semiconductor msm6650 family electrical characteristics dc characteristics parameter symbol condition min. unit "h" input voltage "l" input voltage "h" output voltage "l" output voltage "h" input current 1 "h" input current 2 "l" input current 1 "l" input current 2 operating power consumption standby power consumption i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistance v il =gnd internal pull-up resistance ta=C40c to +50c ta=50c to 85c 4.2 4.6 30 C10 C200 v v v v m a m a m a m a ma m a m a typ. max. 90 C90 6 0.8 0.4 10 200 C30 10 10 30 (v dd =5.0 v, gnd=0 v, ta=C40 to +85c) (note) v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd i ds a nalog characteristics parameter symbol condition min. unit | v dae | r dao r aout r lpf d h d/a output relative accuracy d/a output impedance lpf driving resistance lpf output impedance harmonic wave distortion when d/a output is selected when d/a output is selected when lpf output is selected i f =100 m a 15 50 mv k w k w k w % typ. max. 25 1 2.0 40 35 3 4.0 (v dd =5.0 v, gnd=0 v, ta=C40 to +85c) 2.0v pp sine wave at 1khz input waveform, fs=8khz, harmonic wave distortion= 2nd-21st harmonic wave component signal component+2nd-21st harmonic wave component noise during silence no load, input waveform mute 5 20 mv n s
20/124 ? semiconductor msm6650 family dc characteristics ac characteristics note: applied to msm6658a-xxx and msm66p54-xx, msm66p56-xx. parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd "h" input voltage "l" input voltage "h" output voltage "l" output voltage "h" input current 1 "h" input current 2 "l" input current 1 "l" input current 2 operating power consumiption standby power consumption lpf driving resistance lpf output impedance i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistance v il =gnd internal pull-up resistance ta=C40c to +50c ta=50c to 85c when lpf output is selected i f =100 m a 2.7 2.6 10 C10 C100 50 v v v v m a m a m a m a ma m a m a k w k w (v dd =3.1 v, gnd=0 v, ta=C40 to +85c) typ. max. 30 C30 4 1 0.5 0.4 10 100 C10 7 5 20 3 i ds r aout r lpf parameter symbol condition min. unit f duty t w( rst ) t d( rst ) t w( ran ) t w(sw) t sbs t bn t cha t dar ,t daf t l t stb t ra master clock duty cycle reset input pulse width reset input time after power-on rnd input pulse width sw0-sw3 input pulse width busy output time 1 busy output time 2 chattering prevention time d/a converter change time lpf stable time standby transition time random address capture time see functional description 5.2 at f sam =8 khz see functional description 5.2 40 10 0 100 16 130 14 60 6 0.15 16 % m s m s m s ms m s m s ms ms ms sec m s (v dd =2.4 to 5.5 v, gnd=0 v, ta=C40 to +85c) typ. max. 50 150 15 64 8 0.2 32 60 10 170 16 68 10 0.25 48 (v dd =3.5 to 5.5 v, gnd=0 v, ta=C40 to +85c) (note)
21/124 ? semiconductor msm6650 family timing diagrams power-on timing v dd reset ( i ) busy (o) t w( rst ) t d( rst ) activation of standby state timing when ic is activated * ibusy , standby timings are applied to msm6650 alone. repeated playback timing sw0 (i) busy (o) aout (o) oscillation startup single-phrase playback single-phrase repeated playback t bn sw0 (i) busy (o) aout (o) t w(sw) oscillation startup t cha standby status ibusy (o) stanby (o) standby status d/a converter change time t sbs t l t stb address data capture * * t dar t daf
22/124 ? semiconductor msm6650 family playback timing during transition of sw0-sw3 repeated random playback timing rnd (i) busy (o) aout (o) oscillation startup first phrase pla y same phrase re p eated pla y a2 - a0 (i) sw3 - sw2 (i) "l" sw1 (i) sw0 (i) busy (o) aout (o) t cha first phrase play first phrase pla y back sto p s second phrase play oscillation startup random address capture timing rnd (i) busy (o) aout (o) t w( ran ) t ra oscillation startu p voice output random address fixed time
23/124 ? semiconductor msm6650 family functional description 1. playback code specification the user can specify a maximum of 120 phrases. table 1.1 shows the settings by a2-a0 and sw3- sw0. table 1.1 user specified phrase list a2-a0 sw3-sw0 code description 0000 000 111 0001 1111 inhibit code user specified phrases (120 phrases) 2. internal rom usage and disabled area (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) the last 3 bytes of the internal rom are not to be used as shown in table 2.1. please do not use these 3 bytes when creating the sound rom. table 2.1 shows the addresses that are not to be used for each model. table 2.1 internal rom layout and disabled area type voice data area disabled area msm6652, 6652a 00b00-08ffc 08ffd, 08ffe, 08fff msm6653, 6653a 00b00-10ffc 10ffd, 10ffe, 10fff msm6654, 6654a 00b00-1fffc 1fffd, 1fffe, 1ffff msm6655, 6655a 00b00-2fffc 2fffd, 2fffe, 2ffff msm6656, 6656a 00b00-3fffc 3fffd, 3fffe, 3ffff msm66p54 00b00-1fffc 1fffd, 1fffe, 1ffff msm6658a 00b00-7fffc 7fffd, 7fffe, 7ffff msm66p56 00b00-3fffc 3fffd, 3fffe, 3ffff note: addresses are in hex. 3. pull-up/pull-down resistor the reset , rnd and test pins have internal pull-up resistors and the sw3-sw0 pins have internal pull-down resistors. table 3.1 pins with pull-up/pull-down resistor pins with pull-up pins with pull-down msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a reset , rnd , test sw3-sw0 msm66p54/p56 reset , rnd , test sw3-sw0 msm6650 reset , rnd , test1 , 3 sw3-sw0
24/124 ? semiconductor msm6650 family 4. option(s) in standalone mode the xt/ cr pin can be used to select the oscillation circuit. if this pin is set to "h" level, the circuit is in ceramic oscillation, conversely, if set to "l" level, the circuit is in rc oscillation. in the case of rc oscillation, however, a 32 khz sampling frequency cannot be used. an option to move to standby mode can be selected when rewriting rom data. 5. standalone mode in standalone mode, the sw input interface function and the random playback function can be used. 5.1 sw input interface with the sw input interface, voice synthesis starts when sw3-sw0 pins have changed. to prevent chattering, the address is captured 16 ms (t cha ) after sw3-sw0 pins have changed. voice synthesis does not start if a2-a0 pins have changed. set the rnd pin to "h" level if the random playback function is not used. at power on, sw3-sw0 pins are all "l" level. the sw input interface is effective when operating the msm665x using a push-button switch. speech synthesis starts when an address is changed by pressing the push-button switch. if the push- button switch is released during playback, then playback stops after the current phrase is completed. figure 5.1 sw input interface C playback timing figure 5.1 shows playback timing. sw3-sw0 pins have chattering prevention circuits. the pulse period at each pin requires 16ms (t cha ) or more. if a push-button switch is continuously pushed, the same phrase is played repeatedly. figure 5.2 shows repeated playback timing. figure 5.3 shows timing when a2-a0 are changed during playback. a2 - a0 (i) sw3 - sw1 (i) "l" sw0 (i) busy (o) aout (o) t w(sw) oscillation startup t cha t cha
25/124 ? semiconductor msm6650 family a2 - a0 (i) sw3 - sw1 (i) "l" sw0 (i) busy (o) aout (o) oscillation startup 1st phrase playback 1st phrase continuous pla y back figure 5.2 sw input interface C repeated playback timing a2 - a0 (i) sw3 - sw1 (i) "l" sw0 (i) busy (o) aout (o) oscillation startu p 1st phrase playback 2nd phrase playback figure 5.3 sw input interface playback timing if sw3-sw0 pins change during playback, then playback stops and the next phrase is played. for the next phrase playback, the voice is first stopped and playback occurs after 16 ms of chattering prevention. figure 5.4 shows timing when sw3-sw0 are changed during playback.
26/124 ? semiconductor msm6650 family a2 - a0 (i) sw3 - sw2 (i) "l" sw1 (i) sw0 (i) busy (o) aout (o) t cha 1st phrase playback 1st phrase voice sto p 2nd phrase playback oscillation startup figure 5.4 timing when sw3-sw0 are changed during playback if playback is attempted at an unused address in the phrase rom, then aout goes to 1/2 v dd and playback does not occur. figure 5.5 shows the timing. figure 5.5 timing when playback is attempted at an unused phrase address in the sw interface, addresses (against sw3-sw0) that do not start up voice playback exist without fail. when power is turned on or when input to reset , the addresses set from sw3 to sw0 become the addresses that do not start up voice playback. therefore, when the circuit consists of diode matrixes that use push-button switches, the maximum playback phrases become 120 phrases. combinations of a2-a0 are eight kinds. when addresses of sw3-sw0 that do not start up voice playback are 0000; 2 7 C 8 = 120 (phrases) a2 - a0 (i) sw3 - sw1 (i) "l" sw0 (i) busy (o) aout (o) oscillation startup t bn t l +t dar +t bn
27/124 ? semiconductor msm6650 family 5.2 random playback function the random playback function generates 31 random addresses correspoding to the 5 bits of the addresses of a0, and sw3-sw0 (except all "l") on the ic, after which playback commences. this means there is no external input to the a0, sw3-sw0 pins. since the a0 pin has no internal pull- up/pull-down resistor, permanently set to "l" or "h". playback will not occur if none of the 31 addresses have been assigned a phrase. caution is advised when creating rom data. for example, when four phrases, "sunny", "rainy", "cloudy", and "snowy" are to be played, set the phrases as shown in table 5.1 to 31 random addresses. the four phrases are then played at random as shown below. table 5.1 random address setup example a2, a1 a0, sw3-sw0 phrase 00 00001 00010 00011 00100 00101 11110 11111 sunny rainy cloudy snowy sunny rainy snowy random playback occurs in accordance with the timing shown in figure 5.6. the random address is captured at the fall of the rnd pin, and voice playback commences. when power is turned on, or when reset is input, the phrase at address "00001" is played while a random counter remains initialized until random playback is initiated. rnd (i) busy (o) aout (o) t w( ran ) t ra oscillation startu p voice output random address fixed time figure 5.6 random address capture
28/124 ? semiconductor msm6650 family table 5.2 addresses for random play a2, a1 a0, sw3-sw0 * code description 00 00001 11111 random playback address (31 types) 01 10 11 same as above same as above * address(es) corresponding to a0, sw3-sw0 pins. for a random address, 31 phrases can be set for each logical condition of addresses a2 and a1 (i.e., "00", "01", "10", and "11"). in random playback, note that the four logic states (00, 01, 10, 11) in user specified phrases cannot be used when the phrase rom data is prepared. a random address is set by the "h" level time of the rnd pin, so if the same pulse width is input by microcontroller, the random address fixed time becomes constant, and a "random" phrase may not be played under these conditions. the random address fixed time must be inconsistent in order to produce random playback. rnd (i) busy (o) aout (o) oscillation startu p invalid pulse figure 5.7 timing when a pulse is input to the rnd pin during random play
29/124 ? semiconductor msm6650 family rnd (i) busy (o) aout (o) oscillation startup 1st phrase pla y back same phrase continuous pla y back figure 5.8 repeat playback timing of random play as shown in figure 5.7, if a pulse is input to the rnd pin during voice playback ( busy is "l" level), that pulse becomes invalid. if the rnd pin remains "l" level after phrase playback has been completed, then the same phrase is repeated, as shown in figure 5.8. if sw3-sw0 are changed during random playback, voice playback stops, and voice data that corresponds to sw3-sw0 is played. figure 5.9 shows the timing when sw3-sw0 are changed during random play. sw3 - sw1 (i) sw0 (i) busy (o) aout (o) rnd (i) oscillation startup voice stop playback of random address figure 5.9 timing when a pulse is input to the sw0 pin during random playback table 5.3 and figure 5.10 show the address settings that stop random playback. these settings also stop playback when the "infinite repeat" command is used during edit rom playback.
30/124 ? semiconductor msm6650 family table 5.3 random play and stop addresses a2, a1 a0, sw3-sw0 * code description 00 00001 11111 random play address (31 types) 01 00001 stop address * addresses corresponding to a0, sw3-sw0 pins. sw0 sw1 sw2 sw3 a0 a1 a2 rnd figure 5.10 circuit example for random play stop 6. sampling frequency sampling frequencies can be specified for each phrase in the voice data of the internal rom. for channel synthesis, if channels 1 and 2 are played simultaneously, the channel 1 sampling frequency has priority. when channel 2 is played, only the sampling frequency for the first phrase is valid. the following eight frequencies can be selected when creating voice data. 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, 32.0 khz in standalone, rc oscillation or ceramic oscillation can be selected. if rc oscillation is selected however, 32.0 khz sampling cannot be selected.
31/124 ? semiconductor msm6650 family 7. voice playback time table 7.1 shows internal rom configuration. the actual voice data rom area is different from the indicated rom capacity. the voice data management area shown in table 7.1 is about 6 kbits, and the edit rom area includes 16 kbits. table 7.1 rom configuration voice data management area edit rom area voice data area disabled area use the following formula as a guide to compute voice playback time. playback time = (rom capacity C 16 C 6) 1024 255/256 ? data rate (kbps) for example, if data was created at a 4.0 khz sampling rate using the msm6652 (288-kbit rom), the playback time is (288 C 16 C 6) 1024 255/256 ? 16 (kbps) = 16.9 (sec.) 8. channel status the busy pin outputs the status signals. it outputs "l" level when either channel 1 or 2 is playing voice. "h" level is output when power is turned on. 9. playback method the msm6375 family uses the adpcm playback method, however the msm6650 family has three playback methods: adpcm, pcm and melody playback. the respective features and selection criteria are explained below. 9.1 adpcm method with the adpcm (adaptive differential pulse-code modulation) method, basic quantization width d is adaptively changed for each sampling, and is encoded to 4-bit data each time. this further improves the follow-up properties to speech wave forms. conversion to adpcm data is performed by the development tool ar761 or ar762. adpcm is a compression algorithm which provides the best compromise between quality (bandwidth) and memory usage (data rate). adpcm can be used for accurate reproduction of voice, music, and sound effects.
32/124 ? semiconductor msm6650 family 9.2 pcm method the pcm method of the msm6650 family uses an 8-bit straight binary format. of the three methods, pcm is best suited to accurate reproduction of sound effects or waveforms which are pulse shaped or change rapidly (such as high frequency pure tone sine-waves). 9.3 melody playback method the ar761 and ar762 development tools support melody regeneration system. the melody data can be composed by using these tools. therefore, unique sound can be created. 9.4 data rate of each method the data rate shows the degree of data compression and the data amount to synthesize for 1 second. the data rate is determined by the relationship between the sampling frequency and the format (number of bits per sample). the following formula is used. data rate (kbps) = sampling frequency (khz) number of bits per sample the data rate of the three methods are compared below when the sampling frequency is 6.4 khz. 1) adpcm method data rate (kbps) = 6.4 (khz) 4 (bit) = 25.6 (kbps) 2) pcm method data rate (kbps) = 6.4 (khz) 8 (bit) = 51.2 (kbps) 3) melody playback method with the melody playback method, the data rate changes depend on the tempo or the kind of note ( ) used. the formula does not determine the data rate changes. the average data rate is 8 kbps. the data rate of the melody playback method is calculated as follows: data rate = number of notes per second data amount per note [kbits] for example, to obtain data rate from the following conditions, f sam = 6.4 khz number of notes per second = 1 time [seconds] taken for each thirty-second note = 0.083 sec (tempo = 90) first, obtain the data amount per note with the following expression: data amount per note [kbits] = data amount per thirty-second note [bits per note] 2 = time taken for each thirty-second note [sec] fsam [hz] 8 [bits] 2 = 0.083 6400 8 2 8.5 [kbits] therefore, when the number of notes per second is 1, the data rate is approximately 8.5 kbps. =
33/124 ? semiconductor msm6650 family 9.5 channel synthesis combinations for each playback method melody and beep tone playback is in channel 1 only. table 9.1 channel synthesis combinations * in the case of channel synthesis, verify the voice quality with the msm6650 evaluation board. the combination of channels 1 and 2 can sometimes cause clipping is either of the channels is recorded at a level which is too high. voice (adpcm) melody beep tone silence pcm 0 db C6 to C18 db C6 to C18 db 0 db channel 1 channel 2 voice (adpcm) melody pcm beep tone silence 0 db C6 to C18 db 0 db C6 to C18 db 0 db C6 to C18 db * * * ** * * * * * * * * * * * * * * *
34/124 ? semiconductor msm6650 family 10. standby conversion when standby conversion is selected by mask option, if the next phrase does not start within 200 ms after voice ends, the ic enters standby status and all operation stops. if restarted, it takes about 100 ms from the restart to voice start because the "pop noise" suppression circuit is in operation. if standby conversion is not selected by the mask option, the ic does not enter standby status even if voice playback has ceased. current is drawn since aout remains at about 1/2 v dd and oscillation is in opration. if restarted, playback occurs after 350 m s. to enter standby status when standby conversion is not selected, the reset pulse must be input. if the reset pulse is input, the output level at aout instantaneously goes to gnd level, causing pop noises. table 10.1 standby conversion 11. voice output in standalone mode speech is output via an internal low-pass filter (lpf). table 12.1 shows output level of aout pin. this filter consists of switched capacitors. table 12.2 shows the relationship between sampling frequencies and cutoff frequencies. table 11.1 output level of aout pin playback method adpcm pcm melody beep tone lowest level approx. 0.15 v dd approx. 0.25 v dd approx. 0.25 v dd approx. 0.25 v dd center level approx. 0.5 v dd approx. 0.5 v dd approx. 0.5 v dd approx. 0.5 v dd highest level approx. 0.95 v dd approx. 0.75 v dd approx. 0.75 v dd approx. 0.75 v dd table 11.2 cutoff frequencies of low pass filter sampling frequency (f sam ) cutoff frequency (f cut ) 4.0 khz 5.3 khz 6.4 khz 8.0 khz 10.6 khz 12.8 khz 16.0 khz 32.0 khz approx. 1.8 khz approx. 2.6 khz approx. 2.6 khz approx. 3.2 khz approx. 4.2 khz approx. 5.1 khz approx. 6.4 khz approx. 12.8 khz pin name standby conversion selected msm6650 stby "l" "h" msm66p54/p56 C03 code C04 code msm6652/53/54/55/56, msm6652a/53a/54a/55a/56a/58a no standby conversion selected mask option
35/124 ? semiconductor msm6650 family each device of the msm6650 family contains a 4-order lpf using the switched capacitor filter technology. the attenuation is C40 db/oct. the cutoff frequency and lpf frequency change depending on the sampling frequency (f sam ). the cutoff frequency is 0.4 time as low as the sampling frequency. the lpf frequency characteristics at f sam = 8 khz are shown below. 0 C20 C40 C60 [db] 100 1k 10k C10 10 C30 C50 C80 C70 20 [ hz ] lpf frequency characteristics
36/124 ? semiconductor msm6650 family 12. low-pass filter pop noise each device of the msm6650 family contains a "pop" noise killer circuit. however, a low-pass filter selected may cause "pop" noise as the filter output's circled portions of the figure 12.1 change by approx. 0.7 v abruptly. standby conversion time standby conversion time figure 12.1 pop noise of low-pass filter "pop" noise can be reduced by connecting a diode at the aout output (as shown below). aout figure 12.2 pop noise killer circuit
37/124 ? semiconductor msm6650 family 13. rc oscillation figure 13.1 shows an external circuit diagram using rc oscillation. osc1 osc2 osc3 r1 r2 c figure 13.1 rc oscillation 13.1 determining rc constants the rc oscillation frequency characteristics are shown in figures 13.2, 13.3, and 13.4. if f osc is set to 256 khz, refer to the following values to set the c and r2 based on the printed-circuit board type. r1 = 100 k w , r2 = 30 k w , c = 30 pf (msm6652/53/54/55/56-xxx, msm6652a/ 53a/54a/55a/56a/58a-xxx) r1 = 100 k w , r2 = 25 k w , c = 20 pf (msm66p54-xx/msm66p56-xx) r1 = 150 k w , r2 = 45 k w , c = 10 pf (msm6650) when choosing rc oscillation, the rc oscillation frequency varies according to the fluctuation of the external c and r2. 13.2 fluctuation of rc oscillation frequencies when using a 30 k w r2, the error due to process variations of the ic is 4% maximum so that the fluctuation of the rc oscillation frequency when using a capacitor (c) of 1% accuracy and a resistor (r2) of 2% accuracy is a maximum of 7% approximately.
38/124 ? semiconductor msm6650 family 10 20 30 40 50 60 70 100 200 300 400 oscillation frequency f osc (khz) load resistance r2 (k w ) v dd =3 v r1=100 k w c=20 pf v dd =5 v r1=100 k w c=20 pf v dd =3 v r1=100 k w c=30 pf v dd =5 v r1=100 k w c=30 pf 0 figure 13.2 rc oscillation frequency characteristics (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx)
39/124 ? semiconductor msm6650 family 10 30 40 50 60 70 80 100 200 300 400 oscillation frequency f osc (khz) load resistance r2 (k w ) v dd =5.0 v r1=100 k w c=20 pf v dd =3.5 v r1=100 k w c=30 pf v dd =5.0 v r1=100 k w c=30 pf v dd =3.5 v r1=100 k w c=20 pf 20 0 figure 13.3 rc oscillation frequency characteristics (msm66p54/p56)
40/124 ? semiconductor msm6650 family 20 30 40 50 60 70 80 100 200 300 400 oscillation frequency f osc (khz) load resistance r2 (k w ) v dd =5 v r1=100 k w c=10 pf v dd =5 v r1=150 k w c=30 pf v dd =5 v r1=100 k w c=30 pf v dd =5 v r1=150 k w c=10 pf 0 figure 13.4 rc oscillation frequency characteristics (msm6650)
41/124 ? semiconductor msm6650 family 14. ceramic oscillation figure 14.1 shows an external circuit diagram using a ceramic oscillation. figure 14.1 external circuit diagram figures 14.2 and 14.3 show external circuit diagrams using a ceramic oscillator, csa4.09mgu and cst4.09mgwu made by murata mfg. co., ltd. xt xt c1 c2 xt xt 30 pf 30 pf xt xt internal capacitor figure 14.2 csa4.09mgu figure 14.3 cst4.09mgwu figure 14.4 shows an extend circuit diagram using a ceramic oscillator, pbrc4.00msa/mks/mws made by kyocera corp. when using an oscillator, 4.00 mhz, playback speed is approximately 2% slower than the speed when using the development tools ar761 and ar762 and demonstration board. xt xt 33 pf 33 pf figure 14.4 pbrc4.00msa/mks/mws
42/124 ? semiconductor msm6650 family 15. power supply (for msm6650) the msm6650 should be powered from a single power source to the analog section and digital section separately, as shown below. +5 v dv dd av dd dgnd agnd msm6650 the following power connections are not permitted. dv dd av dd analog supply digital supply power supply dv dd av dd
43/124 ? semiconductor msm6650 family application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 sw0 sw1 sw2 sw3 aout v dd xt/ cr test rnd a0 a1 a2 gnd osc3 osc2 osc1 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 application circuit in standalone mode supporting 15 switch-selected phrases
44/124 ? semiconductor msm6650 family sw0 aout v dd test rnd gnd osc3 osc2 osc1 sw1 sw2 sw3 xt/ cr a0 a1 a2 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 s4 s3 s2 s1 v dd application circuit in standalone mode supporting four switch-selected words switches and playback addresses s1 s2 s3 s4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 1 0 0 0 01 02 04 08 a2 a1 a0 sw3 sw2 sw1 sw0 adr (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx)
45/124 ? semiconductor msm6650 family 1 2 3 4 5 6 7 8 9 101112131415 sw0 sw1 sw2 sw3 ra15 dv dd xt/ cr test1,3 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v cc gnd v pp ce a15 a0 d7 o7 d0 o0 ce oe msm6650 msm27c512 av dd agnd application circuit in standalone mode supporting 15 switch-selected phrases (msm6650)
46/124 ? semiconductor msm6650 family sw0 sw1 sw2 sw3 ra18 dv dd xt/ cr test2 rnd a0 a1 a2 dgnd osc3 osc2 osc1 aout ra0 v dd gnd v pp ce a16 a0 d7 o7 d0 o0 oe msm6650 msm27c101 av dd agnd v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 v dd gnd v pp ce a16 a0 o7 o0 oe msm27c101 ra17 ra16 ce 2g 1b 1g 1y3 1y2 1y1 1y0 1a 74hc139 cpu test3 test1 stby application circuit in standalone mode supporting four 1-mbit eproms (msm6650)
47/124 ? semiconductor msm6650 family microcontroller interface mode features note: actual voice rom area is smaller by 22 kbits. ? 4-bit adpcm or 8-bit pcm sound generation ? melody function ? edit rom function ? two-channel mixing function ? fade-out function via four-step sound volume attenuation ? serial input or parallel input selectable ? built-in beep tone of 0.5 khz, 1.0 khz, 1.3 khz, or 2.0 khz selectable with a specific code ? sampling frequency of 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, or 32.0 khz (32 khz sampling is not possible when using rc oscillation) ? up to 127 phrases ? built-in 12-bit d/a converter ? built-in C40 db/octave low-pass filter ? standby function ? package options: 18-pin plastic dip (dip18-p-300-2.54) (product name: msm6652-xxxrs/msm6653-xxxrs/ msm6654-xxxrs/msm6655-xxxrs/ msm6656-xxxrs/msm6652a-xxxrs/ msm6653a-xxxrs/msm6654a-xxxrs/ msm6655a-xxxrs/msm6656a-xxxrs/ msm6658a-xxxrs) 24-pin plastic sop (sop24-p-430-1.27-k) (product name:msm 6652-xxxgs-k/msm6653-xxxgs-k/ msm6654-xxxgs-k/msm6655-xxxgs-k/ msm6656-xxxgs-k/msm6652a-xxxgs-k/ msm6653a-xxxgs-k/msm6654a-xxxgs-k/ msm6655a-xxxgs-k/msm6656a-xxxgs-k/ msm6658a-xxxgs-k/msm66p54-01gs-k/ msm66p54-02gs-k/msm66p56-01gs-k/ msm66p56-02gs-k) 20-pin plastic dip (dip20-p-300-2.54-w1) (product name: msm66p54-01rs/msm66p54-02rs/ msm66p56-01rs/msm66p56-02rs) 64-pin plastic qfp (qfp64-p-1420-1.00-bk)(product name: msm6650gs-bk) 64-pin plastic sdip (sdip64-p-750-1.78) (product name: msm6650ss) device name data rom size maximum playback time (sec) f sam =4.0 khz f sam =6.4 khz f sam =8.0 khz f sam =16 khz msm6650 64 mbits (max) 4194.3 2620.5 2096.4 1048.2 msm6656, 6656a 2 mbits 80.7 64.5 32.2 msm6655, 6655a 1.5 mbits 96.5 60.3 48.2 24.1 msm6654, 6654a 1 mbit 63.8 39.9 31.9 15.9 msm6653, 6653a 544 kbits 31.2 19.5 15.6 7.8 msm6652, 6652a 288 kbits 16.9 10.5 8.4 4.2 msm66p54 1 mbit 63.8 39.9 31.9 15.9 129.1 80.7 64.5 32.2 msm6658a 4 mbits 259.7 162.9 129.8 64.9 f sam =32 khz 524.1 16.1 12.0 7.9 3.9 2.1 7.9 32.4 msm66p56 2 mbit 129.1 80.7 64.5 32.2 16.1
48/124 ? semiconductor msm6650 family ? option table option input interface mode standby conversion option a option b option c option d microcontroller standalone microcontroller standalone serial parallel yes no item ceramic sample mold sample mass produc- tion package (circle the desired one) quantity note 18-pin dip (ceramic) 18-pin dip (plastic) 18-pin dip (plastic) 24-pin sop (ceramic) 24-pin sop (plastic) 24-pin sop (plastic) chip chip chip pcs pcs pcs per lot monthly up to 10 samples. operating temp. : 10 to 30c up to 50 samples option list oki electric industry co., ltd. date: you are requested to develop msm665x-xxx on the following conditions. 1. options there are four options for the msm6650 family. choose and circle the desired option. 2. package and quantity signed by title : company name : *1. the options for the mask rom-based devices are mask options. the user should send oki an option list before starting development. a sample of option list is shown below. *2. a code of otp version device corresponds to one of the options. the user should specify either msm66p54-01 or msm66p54-02 or msm66p56-01 or msm66p56-02. (in this case, no option list is required.) pin name microcontroller interface mode serial input parallel input with standby no standby stby "l" "h" msm6650 serial "h" "l" "l" "l" cpu "h" "h" "l" "l" msm66p54/p56 C01 C02 C03 C04 msm6652/53/54/55/56 standalone mode mask option *1 *2 msm6652a/53a/54a/55a/56a/58a
49/124 ? semiconductor msm6650 family block diagrams msm6652/53/54/55/56-xxx msm6652a/53a/54a/55a/56a/58a-xxx rom (containing 22-kbit edit rom & address rom) 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) multiplexer address & command controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 16- bit (msm6652/52a) 17- bit (msm6653/53a) 17- bit (msm6654/54a) 18- bit (msm6655/55a) 18- bit (msm6656/56a) 19- bit (msm6658a) address counter timing controller gnd v dd reset i/o interface osc i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 ch nar xt xt (msm6652/52a) (msm6653/53a) (msm6654/54a) (msm6655/55a) (msm6656/56a) (msm6658a) 288-kbit 544-kbit 1-mbit 1.5-mbit 2-mbit 4-mbit st cmd busy
50/124 ? semiconductor msm6650 family msm66p54/p56-xx i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 nar xt xt reset v dd gnd aout pgm v pp address & command controller i/o interface osc 17- bit (msm66p54-xx) 18- bit (msm66p56-xx) multiplexer 17- bit (msm66p54-xx) 18- bit (msm66p56-xx) address counter timing controller program circuit 1-mbit otp rom (msm66p54-xx) 2-mbit otp rom (msm66p56-xx) (containing 22-kbit edit rom & address rom) data controller adpcm synthesizer pcm synthesizer melody generator beep tone generator 12- bit dac lpf 12 8 7 busy cmd st ch
51/124 ? semiconductor msm6650 family msm6650 8-bit latch 23-bit multiplexer address & switching controller 7 adpcm synthesizer pcm synthesizer 12 8 12-bit dac lpf aout data controller melody generator beep tone generator 23-bit address counter timing controller dgnd dv dd reset i/o interface osc test1 i6/sd i5/si i4 i3/port1 i2/port0 i1 i0 ce rcs busy nar ibusy standby xt xt mck av dd agnd serial cpu test2 ra22 ra0 d7 d0 ch st cmd
52/124 ? semiconductor msm6650 family pin configuration (top view) the msm66p54/p56-xx has two more pins than the msm6652-6658a while their pin configurations are identical. the additional two pins (v pp , pgm ) of the msm66p54/p56-xx may be open at playback after completion of writing. msm6652-xxxgs-k, msm6653-xxxgs-k, msm66p54-01/-02gs-k msm6654-xxxgs-k, msm6655-xxxgs-k, msm66p56-01/-02gs-k msm6656-xxxgs-k, msm6652a-xxxgs-k, msm6653a-xxxgs-k, msm6654a-xxxgs-k, msm6655a-xxxgs-k, msm6656a-xxxgs-k, msm6658a-xxxgs-k msm6652-xxxrs, msm6653-xxxrs, msm6654-xxxrs, msm66p54-01/-02rs msm6655-xxxrs, msm6656-xxxrs, msm6652a-xxxrs, msm66p56-01/-02rs msm6653a-xxxrs, msm6654a-xxxrs, msm6655a-xxxrs, msm6656a-xxxrs, msm6658a-xxxrs 18-pin plastic dip 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 ch i6/sd i5/si i4 reset nar aout i3/port1 i2/port0 i1 i0 st cmd xt xt msm6652-6658a ( mask rom) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc nc st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc nc reset ch i6/sd i5/si i4 busy gnd v dd msm6652-6658a ( mask rom) 20-pin plastic dip 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ch i6/sd i5/si i4 v pp reset busy nar aout gnd pgm i3/port1 i2/port0 i1 i0 st cmd xt xt v dd msm66p54 / p56 (otp) 24-pin plastic sop 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 v dd xt xt nc cmd nc pgm st i0 i1 i2/port0 i3/port1 gnd aout nar nc busy nc v pp reset ch i6/sd i5/si i4 msm66p54 / p56 (otp)
53/124 ? semiconductor msm6650 family msm6650 product name: msm6650gs-bk 1 nc busy nar nc aout agnd dgnd av dd dv dd xt xt mck cmd st test1 cpu serial ibusy nc ra10 ra9 ra8 ra7 ra6 ra5 ra4 ra3 ra2 ra1 ra0 d7 d6 d5 d4 d3 d2 d1 nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 ra13 ra12 ra11 standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ce rcs d0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 nc : no connection 64-pin plastic qfp
54/124 ? semiconductor msm6650 family 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ce xt mck cmd st test1 cpu serial ibusy nc standby i0 i1 i2/port0 i3/port1 i4 i5/si i6/sd ch reset ra13 xt dv dd av dd dgnd agnd aout nar busy nc test2 ra22 ra21 ra20 ra19 ra18 ra17 ra16 ra15 ra14 45 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 21 22 23 24 25 26 27 28 29 30 31 32 44 43 42 41 40 39 38 37 36 35 34 33 rcs ra12 d0 ra11 nc ra10 d1 nc d2 ra9 d3 ra8 d4 ra7 d5 ra6 d6 ra5 d7 ra4 ra0 ra3 ra1 ra2 nc : no connection 64-pin plastic sdip
55/124 ? semiconductor msm6650 family pin descriptions 1.msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx 18-pin plastic dip symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. the devices have an internal power-on reset. v dd must be raised within 1 ms to operate power-on reset correctly. if v dd is not raised within 1 ms, then the reset pulse must be applied when power is turned on. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 5 13 14 4 3 2 6 7 8 12 11 1 18 17 15, 16 ground pin. gnd 9 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 10
56/124 ? semiconductor msm6650 family 2.msm66p54/p56-xx 20-pin plastic dip symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. the devices have an internal power-on reset. v dd must be raised within 1 ms to operate power-on reset correctly. if v dd is not raised within 1 ms, then the reset pulse must be applied when power is turned on. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 6 14 15 5 4 3 7 8 9 13 12 2 19 18 16, 17 ground pin. gnd 10 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 11 supply voltage for writing data to internal otp rom. v pp 1 pgm i interface with voice analysis edit tools ar761 and ar762. set to "l" level or leave open during playback. this pin has an internal pull-down resistor. 20
57/124 ? semiconductor msm6650 family 3. msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx 24-pin plastic sop symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. the devices have an internal power-on reset. v dd must be raised within 1 ms to operate power-on reset correctly. if v dd is not raised within 1 ms, then the reset pulse must be applied when power is turned on. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. pin 17 5 8 16 15 14 20 22 23 3 2 13 12 11
58/124 ? semiconductor msm6650 family symbol type description i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 9, 10 ground pin. gnd 24 power supply. insert a 0.1f ro more bypass capacitor between this pin and gnd. v dd 1 supply voltage for writing data to internal otp rom. v pp 18 pgm i interface with voice analysis edit tools ar761 and ar762. set to "l" level or leave open during playback. this pin has an internal pull-down resistor. 7 * * * pins for msm66p54/56-xx only
59/124 ? semiconductor msm6650 family 4.msm6650 64-pin plastic qfp (64-pin plastic sdip) symbol type description reset cmd st reset. the devices enter stanby status when a low level is input to this pin. when reset, oscillation stops. the aout output goes to ground and the ic status is reinitialized. the devices have an internal power-on reset. v dd must be raised within 1 ms to operate power-on reset correctly. if v dd is not raised within 1 ms, then the reset pulse must be applied when power is turned on. this pin has an internal pull-up resistor. i i i ch i6/sd i5/si i i i busy o nar o busy. outputs a "l" level during playback and a "h" level when power is turned on. the cmd and st inputs become effective when high. nar indicates whether the address bus (i0 through i6) is ready to accept another address. when high, it is ready to accept. nar goes high when power is turned on. aout o analog speech output. d/a converter output or lpf output is selected by entering the command. ceramic oscillator output. if an external clock is used, leave this pin open. xt o command input and option control. this pin is used as command and option input when cmd is at the high level with st low. if this pin is not used or serial input is optioned, set this pin to "h" level. this pin has an internal pull-up resistor. start. speech playback starts at the fall of the st pulse. the i0 - i6 addresses are latched at the rise of the st pulse. input a st pulse when nar goes to the high level for channels 1 and 2. this pin has an internal pull-up resistor. channel control. channel 1 is selected when the input is pulled high. channel 2 is selected when the input is low. this pin has an internal pull-up resistor. this pin is command and user-defined phrase input when parallel input is optioned. this pin is serial data (command and address) input when serial input is optioned. this pin is command and user-defined phrase input when parallel input is optioned. this pin is used as serial clock input when serial input is optioned. xt i ceramic oscillator input. this pin has an internal 0.5 to 5 m w feedback resistor between xt and xt . if an external clock is used, this is the clock input pin. i4 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. i3/port1 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i2/port0 i/o this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, this pin is a port output. the port output is controlled by entering external silence insertion code. i0, i1 i this pin is command and user-defined phrase input when parallel input is optioned. when serial input is optioned, set this pin to "l" level. this pin has an internal pull-down resistor. pin 29 (19) 13 (3) 14 (4) 28 (18) 27 (17) 26 (16) 3 (57) 4 (58) 5 (59) 11 (1) 10 (64) 25 (15) 24 (14) 23 (13) 21, 22 (11, 12)
60/124 ? semiconductor msm6650 family symbol type description agnd analog ground pin. mck o main clock output pin. use mck as a connection pin for the msc1192, etc. when the ic is in standby status, mck is held high. cpu i cpu mode. set to "h" level to select microcontroller interface mode. serial i serial/parallel interface select. this input selects either the parallel or the serial input interface. the serial input interface is selected with a high level; the parallel input interface is selected with a low level. ce o chip enable. ce is a timing output pin to control read of external memory. this pin outputs when rcs is at the "l" level. this pin goes high impedance when rcs is at the "h" level. rcs i read chip select. the data bits d0-d7 are internally pulled down when rcs is high. dgnd digital ground pin. av dd analog power pin. insert a 0.1 m f or more bypass capacitor between this pin and agnd. dv dd digital power pin. insert a 0.1 m f or more bypass capacitor between this pin and dgnd. d0 - d7 i external memory data bus. data is input when rcs is low. when rcs is high, these pins become low due to internal pull-down resistors. ra0 - ra22 o external memory address. these are address pins for an external memory output when rcs is low. these pins become high impedance status if rcs is in "h" level. test1 , 2 i test. set these pins to "h" level. ibusy o outputs a "l" level during playback or when aout is at 1/2 v dd (except standby conversion) standby o outputs a "l" level during which the device is oscillating. pin 6 (60) 12 (2) 16 (6) 17 (7) 30 (20) 31 (21) 7 (61) 8 (62) 9 (63) 32, 34-40 (22, 24-30) 41-63 (31-40, 42-54) 15, 64 (5, 55) 18 (8) 20 (10)
61/124 ? semiconductor msm6650 family absolute maximum ratings parameter symbol condition rating unit ta = 25c (gnd=0 v) v dd C0.3 to +7.0 v power supply voltage v in C0.3 to v dd+ 0.3 v input voltage t stg C55 to +150 c storage temperature recommended operating conditions parameter symbol condition range unit (gnd=0 v) typ. min. max. 4.096 3.5 4.5 mhz v dd msm6652-56, msm6650, msm6652a-56a 2.4 to 5.5 v msm6658a, msm66p54/p56 3.5 to 5.5 v t op operating temperature C40 to +85 c f osc master clock frequency power supply voltage
62/124 ? semiconductor msm6650 family electrical characteristics dc characteristics *1. applied to reset , cmd , st , ch . *2. applied to msm6652/53/54/55/56, msm6652a/53a/54a/55a/56a/58a, msm6650. *3. applied to msm66p54/p56. dc characteristics note: applied to reset, cmd, st, ch. parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd high level input voltage low level input voltage high level output voltage low level output voltage high level input current 1 high level input current 2 low level input current 1 low level input current 2 operating current standby current d/a output relative accuracy i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistor v il =gnd internal pull-up resistor ta=C40c to +50c ta=50c to 85c when d/a output selected 4.2 4.6 30 C10 C200 v v v v m a m a m a m a ma m a m a mv typ. max. 90 C90 6 0.8 0.4 10 200 C30 10 10 30 40 (v dd =5.0 v, gnd=0 v, ta=C40 to +85c) *1 r dao r aout r lpf d/a output impedance lpf driving resisance lpf output impedance when d/a output selected *2 when d/a output selected *3 when lpf output selected i f =100 m a 15 15 50 k w k w k w k w 25 30 1 35 45 3 i ds | v dae | parameter symbol condition min. unit v ih v il v oh v ol i ih1 i ih2 i il1 i il2 i dd high level input voltage low level input voltage high level output voltage low level output voltage high level input current 1 high level input current 2 low level input current 1 low level input current 2 operating current standby current d/a output relative accuracy d/a output impedance lpf driving resistance lpf output impedance i oh =C1 ma i ol =2 ma v ih =v dd internal pull-down resistor v il =gnd internal pull-up resistor ta=C40c to +50c ta=50c to 85c when d/a output selected when d/a output selected when lpf output selected i f =100 m a 2.7 2.6 10 C10 C100 15 50 v v v v m a m a m a m a ma m a m a mv k w k w k w (v dd =3.1 v, gnd=0 v, ta=C40 to +85c) typ. max. 30 C30 4 25 1 0.5 0.4 10 100 C10 7 5 20 20 35 3 (note) i ds | v dae | r dao r aout r lpf
63/124 ? semiconductor msm6650 family ac characteristics parameter symbol condition min. unit f duty t w( rst ) master clock duty cycle 40 10 % m s typ. max. 50 60 t stb 0.15 0.2 0.25 sec t sbs t bn t ba t sns t naa t nab t nac t dar, t daf t l m s t d( rst ) t siss t dw t wd t csf t cs t sc t chs t sch t w(sck) when using parallel input when the stop code is input during serial input at power-on when using serial input t ssi 0 1 1 1 1 1 1 1 1 0.35 1 m s m s m s m s m s m s m s m s m s reset input pulse width reset input time after power-on st input pulse width st - st pulse interval data setup time data hold time command setup time 1 command setup time 2 command hold time channel setup time channel hold time serial clock pulse width serial clock setup time m s t sis 1 serial clock hold time serial data setup time serial data hold time busy output time 2 nar output time 1 nar output time 2 nar output time 3 nar output time 4 d/a converter change time lpf stable time standby conversion time (after voice ends) t sds m s t ( st ) t ss m s 40 m s 0.35 2000 when using serial input m s 1 when using serial input m s 1 m s 10 when f sam =8 khz 375 m s 350 400 m s 10 375 m s 350 400 375 m s 350 400 375 m s 350 500 64ms 60 68 8ms 610 when f sam =8 khz when f sam =8 khz when f sam =8 khz busy output time 3 when f sam =8 khz 375 m s 350 400 t ssd busy output time 1 (v dd =2.4 to 5.5 v, gnd=0 v, ta=C40 to +85c) (v dd =3.5 to 5.5 v, gnd=0 v, ta=C40 to +85c) * st - st pulse interval address capture time for msm6650 m s 500 t ced * applied to msm6658a-xxx and msm66p54/p56-xx.
64/124 ? semiconductor msm6650 family timing diagrams power-on timing v dd reset ( i ) busy (o) t w( rst ) t d( rst ) t csf cmd or st (i) standby state timing when ic is activated busy (o) aout (o) t l t dar t stb t daf t sbs nar (o) t naa st (i) t ( st ) cmd (i) i6-i0 (i) t dw t wd t cs t sc voice playback t sns oscillation statu p
65/124 ? semiconductor msm6650 family busy (o) aout (o) t l t dar nar (o) st ( i ) cmd ( i ) i6 - i0 (i) ch ( i ) t bn t nab t nac "h" "h" 1st phrase adress 2nd phrase address 3rd phrase address 1st phrase play 2nd phrase play 3rd phrase play oscillation startup t ba channel 1 playback timing with no extemal commands (parallel input)
66/124 ? semiconductor msm6650 family busy (o) aout (o) nar (o) st ( i ) cmd ( i ) i6 - i0 (i) ch ( i ) "h" command data 1st phrase (adress data) 2nd phrase (adress data) 1st phrase play 2nd phrase play oscillation startup channel 1 playback timing when external commands are used (parallel input) playback timing set by entering an external command remains unchanged unless other external command is entered. therefore, both 1st phrase and 2nd phrase are played in the same timing. to change playback timing, be sure to enter command data before address data.
67/124 ? semiconductor msm6650 family busy (o) aout (o) nar (o) st ( i ) cmd ( i ) i6 - i0 (i) ch ( i ) "h" command data 1st phrase (adress data) command data 2nd phrase (address data) 1st phrase play channel 2 playback 3rd phrase (adress data) t sch t chs 2nd phrase play 3rd phrase play oscillation startup channels 1 and 2 playback timing when external commands are used (parallel input) command data keeps a just previous command regardless of the channel. if playback starts without setting of command, the 3rd phrase is played as set in the 2nd phrase.
68/124 ? semiconductor msm6650 family busy (o) aout (o) nar (o) st ( i ) cmd ( i ) i6/sd ( i ) ch ( i ) "h" i5/si ( i ) t sds t ssd t w(sck) 1st phrase adress serial input 2nd phrase address serial input 1st phrase play "h" t sis t ssi t sis oscillation startup note : set i5/si to "l" level before st falls to "l" level. playback timing with no external commands (serial input) when serial input is selected, data is transferred into the ic when the st signal is triggered after serial data is entered. sd is captured on the leading edge of si.
69/124 ? semiconductor msm6650 family busy (o) aout(o) nar(o) st (i) cmd (i) i6/sd(i) ch (i) "h" i5/si(i) i3/port1(o) i2/port0(o) silence command input command serial input 1st phrase address serial input port output playback command setting "h" oscillaiton startup t siss serial input enables setting a port output by entering a command. since port output commands and internal commands are shared, if a command for port output is entered, address data should be entered after a command for voice is entered. otherwise, the input is recognized as a silence insertion code by the ic. the umber of command inputs are not limited until address input. however, an efective command is the one finally entered (common for channel 1 and channel 2). playback timing with external commands (serial input)
70/124 ? semiconductor msm6650 family type voice data area disabled area msm6652, 6652a 00b00-08ffc 08ffd, 08ffe, 08fff msm6653, 6653a 00b00-10ffc 10ffd, 10ffe, 10fff msm6654, 6654a 00b00-1fffc 1fffd, 1fffe, 1ffff msm6655, 6655a 00b00-2fffc 2fffd, 2fffe, 2ffff msm6656, 6656a 00b00-3fffc 3fffd, 3fffe, 3ffff msm66p54 00b00-1fffc 1fffd, 1fffe, 1ffff msm6658a 00b00-7fffc 7fffd, 7fffe, 7ffff msm66p56 00b00-3fffc 3fffd, 3fffe, 3ffff functional description parallel or serial input can be selected for the microcontroller interface. table 1.1 shows the corre- spondence, between serial input and parallel input. table 1.1 interface 1. playback code specification the user can specify a maximum of 127 phrases. table 1.1 shows the settings by i6 to i0. table 1.2 user specified phrase list i6-i0 code details 0000000 0000001 1111111 stop code user specified phrase (127 phrases) 2. internal rom usage and disabled area (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xxx) the last 3 bytes of the internal rom are not to be used as shown in table 2.1. please do not use these when creating the sound rom. table 2.1 shows the addresses that are disabled. table 2.1 internal rom layout and disabled area pin name serial input msm6650 serial "h" "l" cpu "h" "h" msm66p54/p56 C01 code C02 code msm6652/53/54/55/56, msm6652a/53a/54a/55a/56a/58a parallel input mask option note: addresses are in hex.
71/124 ? semiconductor msm6650 family 3. pull-up/pull-down resistor reset, cmd, st and ch pins have internal pull-up resistor. i6 to i0 pins do not have internal pull- up/pull-down resistor. when serial input option is selected, i4, i1 and i0 pins have internal pull-down resistor. table 3.1 pins with pull-up/pull-down resistor 4. options in microcontroller interface mode, two option selection methods are available; i.e. the mask option to be set at the time of manufacture of rom data and the command option which is set by the command setting. in the mask option, either parallel input or serial input of commands and phrase addresses can be selected. however, when the mask option is selected, no change can be made once the option is selected after manufacture of rom data. the command option can select three items. table 4.1 shows selectable options. table 4.1 option item list item remarks no. selection if standby conversion is selected (yes), the msm665x nters standby unless the next specified phrase is input within 200 ms after voice ends. dac output 1/4v dd to 3/4v dd (1/2 amplitude) no lpf output 0 to v dd yes aout output maximum amplitude of a single phrase standby conversion maximum amplitude of a single phrase 2 3 1 pull-up resistor pull-down resistor msm6652/53/54/55/56, msm6652a/53a/54a/ 55a/56a/58a reset , cmd , st , ch msm66p54/p56 reset , cmd , st , ch msm6650 reset , cmd , st , ch serial input parallel input pull-down resistor i4, i1, i0 i4, i1, i0 i4, i1, i0 pull-up resistor reset , cmd , st , ch reset , cmd , st , ch reset , cmd , st , ch
72/124 ? semiconductor msm6650 family an option is set as in table 4.2 when power is turned on. table 4.2 option selection when power is turned on and at reset input standby conversion aout output amplitude for 1 phrase yes lpf output 0 to v dd to change an option that is already set, use the command input. if the reset pin is set to "l" level, the option returns to the status when power was turned on (table 4.2). after setting the option, be certain to input the voice, silence and beep tone commands, then start up. figures 4.1 and 4.2 show the option set timing, and tables 4.3 and 4.4 show the corresponding options. i6/sd (i) "l" i5/si (i) "l" i3, i2, i0 (i) cmd (i) st (i) option set data o p tion data ca p ture figure 4.1 option set timing (during parallel input) table 4.3 relationship between options and i3, i2, i0 i3 aout lpf dac "0" data "1" data i2 standby conversion yes no i0 amplitude of a single phrase 0 to v dd 1/4 v dd to 3/4v dd
73/124 ? semiconductor msm6650 family i6/sd (i) i5/si (i) st (i) aout standby conversion amplitude of 1 phrase o p tion data ca p ture figure 4.2 option set timing (during serial input) table 4.4 relationship between options and serial data aout lpf dac "0" data "1" data standby conversion yes no amplitude of a single phrase 0 to v dd 1/4v dd to 3/4v dd
74/124 ? semiconductor msm6650 family 5. microcontroller interface mode external command settings are enabled with the microcontroller interface. however, if the edit rom is used, the command settings of channel 1 are disabled. figures 5.1 and 5.2 show the command input and address input method when using the microcontroller interface. i6 - i0 ( i ) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) command data adress data oscillation startu p voice end figure 5.1 command, address input timing (parallel input) figure 5.2 command, address input timing (serial input) busy (o) aout (o) nar (o) st ( i ) i6/sd ( i ) i5/si ( i ) i6 i5 i4 i3 i2 i1 i0 i6 i5 i4 i3 i2 i1 i0 command input adress input oscillation startup t siss
75/124 ? semiconductor msm6650 family in microcontroller interface serial input, command and address data are identified by the initial data input serially. if the initial data is "h" level, it is identified as command data, if "l", it is identified as address data. command and address data must be input after the command and address identification data are input initially. figures 5.3, 5.4 and 5.5 show the external input flow. power on adress input voice ended? end no yes nar is "h"? st pulse input no yes figure 5.3 input flowchart when command is not set
76/124 ? semiconductor msm6650 family power on option code set set ch pin to "h" yes option set ? no yes channel set ? set ch pin to "l" set cmd pin to "l" command is set ? nar is "h" ? 1. voice 2. beep tone 3. silence beep tone set 1. frequency set 2. sound volume set silence insertion code set ( port output set) voice control code set 1. smoothing set 2. repeat set 3. sound volume set st pulse input set cmd pin to "h" st pulse input set cmd pin to "h" silence time set beep tone time set phrase address input st pulse input ended ? end no yes adress data input command data input (*) 2 1 3 no no 2ch 1ch yes st pulse input set cmd pin to "h" *beep tone code cannot be set for channel 2. figure 5.4 parallel input flowchart when external command is used
77/124 ? semiconductor msm6650 family figure 5.5 serial input flowchart when external command is used end phrase address input beep tone time set silence time set pulse input to i5 pulse input to i5 pulse input to i5 set i6 pin to "l" set i6 pin to "l" set i6 pin to "l" set st pin to "l" set st pin to "l" set st pin to "l" set st pin to "h" set st pin to "h" set st pin to "h" ended ? nar is "h" option set ? command set ? set ch pin to "l" set ch pin to "h" channel set ? set st pin to "h" option code set pulse input to i5 set i6 pin to "l" set st pin to "l" power on no yes 1. voice 2. beep tone 3. silence beep tone code set 1. frequency set 2. sound volume set silence insertion code set (port output set) voice control code set 1. smoothing set 2. repeat set 3. sound volume set no yes no no 2ch 1ch *beep tone code cannot be set for channel 2. pulse input to i5 set i6 pin to "h" set st pin to "l" yes yes 31 2 (*)
78/124 ? semiconductor msm6650 family 6. command data table 6.1 shows the conditions that can be set by the command data. command data is set with i6- i0. in serial input, data is input corresponding to i6-i0 serially as shown in figure 5.2. table 6.1 command setting content list i6 i5 i4 i3 i2 i1 i0 command description ov 0 00 0oaos bf1 bf2 1 0 0 bl1 bl2 vl1 vl2 1 1 sm rp1 rp0 three options can be set. the "0" data option is set upon power on or after reset input. (see table 4.2.) pin i3 (oa) i2 (os) i0 (ov) the silence insertion code inserts silence into the specified channel. it also sets the port output signals by using the i2 and i3 pins when serial input is selected. after the silence insertion code is input, the silence time is set by address data input. after the beep tone code is input, the beep tone time is set by entering address data. i3(bl1) i2(bl0) 1/8 amplitude of channel 1 volume i1(bf1) i0(bf0) frequency (khz) the voice control code sets the number of repeats and sound volume. when the number of repeats is set, sound volume smoothing can also be set. volume smoothing during repeating disabled enabled i4 (sm) 0 1 number of repeats 1 2 4 infinite i3(rp1) 0 0 1 1 i2(rp0) 0 1 0 1 attenuation 0 db C6 db C12 db C18 db 0 0 01 0p1p0 option setting silence insertion code silence time = address data (i6 to i0) 16.384 ms beep tone code 0 0 1 1 0 1 0 1 1/4 amplitude of channel 1 1/3 amplitude of channel 1 1/2 amplitude of channel 1 0 0 1 1 0 1 0 1 0.5 1.0 1.3 2.0 beep tone time = address data (i6 to i0) 16.384 ms voice control code i1(vl1) 0 0 1 1 i0(vl0) 0 1 0 1 option item "0" data "1" data aout output lpf dac yes no standby conversion amplitude of a single phrase 0 to v dd 1/4v dd to 3/4 v dd
79/124 ? semiconductor msm6650 family 6.1 option code setting an option can be set by command after power on. once an option is set, it remains effective until either power is shut off or until the reset signal is input. when an option is set, input speech, silence and beep tone commands again by command and address data input (phrase, silence time and beep tone time). table 6.2 shows the options that can be set. table 6.2 relationship between options and i3, i2, i0 i3 aout output i2 standby conversion i0 amplitude of a single phrase "0" data "1" data lpf dac yes no 0 to v dd 1/4 v dd to 3/4 v dd see figure 4.2 for command option set timing chart. options can be set anytime, but if set during playback, the output impedance and amplitude of aout may change.
80/124 ? semiconductor msm6650 family 6.2 silence insertion code silence insertion code inserts silence in the specified channel externally, thereby reducing voice data. it also sets the port output signals when serial input is selected. i6 0 x: don't care i5 1 i4 x i3 p1 i2 p0 i1 x i0 x silence is inserted with command data, and silence time is set with address data. the ch pin selects the channel for silence insertion (channel 1 or 2). silence time is set by address data (i6 to i0). minimum silence time: 16.384 ms maximum silence time: (128 C 1) 16.384 ms = 2.1 sec figure 6.1 shows the channel 1 silence insertion set timing. i6/sd ( i ) i5/si ( i ) i4 - i0 ( i ) ch ( i ) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) "h" don't care silence time setting data silence time setting data silence time setting data silence command ca p ture silence time ca p ture silence time (t mu ) figure 6.1 channel 1 silence set timing (parallel input)
81/124 ? semiconductor msm6650 family for example, if silence time set data shown in figure 6.1 is set to (i6 to i0) = ("0011000"), the silence time (t mu ) becomes (2 6 0+2 5 0+2 4 1+2 3 1+2 2 0+2 1 0+2 0 0) 16.384 ms = 393.216 ms the formula to set silence time is shown below. t mu = (2 6 (i6)+2 5 (i5)+2 4 (i4)+2 3 (i3)+2 2 (i2)+2 1 (i1)+2 0 (i0)) 16.384 ms the channel 2 silence insertion set timing is as shown in figure 6.2. i6/sd ( i ) i5/si ( i ) i4-i0 ( i ) ch ( i ) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) don't care silence time setting data silence time setting data silence time setting data silence command ca p ture silence time ca p ture silence time (t mu ) figure 6.2 channel 2 silence set timing (parallel input) in serial input, the port output signals from i3/port1, i2/port0 are also controlled by the si- lence insertion code. i3/port1, i2/port0 are in "l" level when power is turned on, and when the reset signal is input. when setting the port outputs, first set the port output with a silence insertion code, then input a voice playback code and set the address. figure 6.3 shows the timing. a port cannot be set continuously, if it is necessary to set a port again (after previously being set) a beep tone or voice playback code must first be input, after which the port can be set again.
82/124 ? semiconductor msm6650 family figure 6.3 port output and command, address set timing (during serial input) busy (o) aout (o) nar (o) st ( i ) cmd ( i ) i6/sd ( i ) ch ( i ) "h" i5/si ( i ) i3/port1 (o) i2/port0 (o) "h" command (silence insertion) input command (voice control) input address input port output voice playback code set oscillation startup t siss
83/124 ? semiconductor msm6650 family 6.3 beep tone code the beep tone code produces the tone from an internal circuit which is independent of the adpcm circuitry. a beep tone can be set in channel 1 only. when mixing a beep tone (channel 1) and an 8 khz phrase in channel 2, be advised that playback of the phrase (at 8 khz), also plays the beep tone at the phrase frequency (8 khz). i6 i5 i4 i3 i2 i1 i0 1 0 0 bl1 bl0 bf1 bf0 the sound volume is set with i3, i2 pins, and the frequency is set with i1, i0 pins. tables 6.3 and 6.4 show the sound volumes and the frequencies that can be set. table 6.3 sound volume settings table 6.4 frequency settings i3 i2 sound volume (note 1) 0 0 1/8 amplitude sound volume of channel 1 01 10 11 i1 i0 frequency 0 0 0.5 khz 01 10 11 1.0 khz 1.3 khz 2.0 khz 1/4 amplitude sound volume of channel 1 1/3 amplitude sound volume of channel 1 1/2 amplitude sound volume of channel 1 note 1. if 1/2 amplitude of channel 1 is set, and if the maximum amplitude is set to 1/2 v dd as an option the sound volume of the beep tone becomes 1/4 v dd . the beep tone time is set by address data (i6 to i0). minmum beep tone time: 16.384 ms maximum beep tone time: (128 C 1) 16.384 ms = 2.1 sec. (approx.)
84/124 ? semiconductor msm6650 family figure 6.4 shows beep tone set timing. i6/sd ( i ) i5/si ( i ) i4 - i0 (i) ch ( i ) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) sound volume frequency setting beep tone time set data beep tone time set data beep tone time set data beep tone command ca p ture beep tone time ca p ture beep tone time (t be ) "h" figure 6.4 beep set timing (during parallel input) for example, if the beep tone time set data shown in figure 6.4 is set as (i6 to i0) = ("0011000"), the beep tone time (t be ) is (2 6 0+2 5 0+2 4 1+2 3 1+2 2 0+2 1 0+2 0 0) 16.384 ms = 393.216 ms the formula to set beep tone time is shown below. t be = (2 6 (i6)+2 5 (i5)+2 4 (i4)+2 3 (i3)+2 2 (i2)+2 1 (i1)+2 0 (i0)) 16.384 ms 6.4 voice control code command data can set the number of repeats and sound volume. i6 i5 i4 i3 i2 i1 i0 1 1 sm rp1 rp0 vl1 vl0
85/124 ? semiconductor msm6650 family channel 1 is set when the ch pin is "h" level, channel 2 is set when ch is "l" level. once a command is set, it is maintained as both channels until another command is input. the condition of each channel is set by i4 to i0. three conditions can be set: 1) to 3). 1) setting the number of repeats the number of repeats is set by the i3 and i2 pins, and four types can be selected: 1, 2, 4 and infinite. a stop code must be input to stop voice when infinite repeat is selected. table 6.5 shows the relationship between i3 and i2 pins, and the number of repeats. table 6.5 selection of number of repeats i3 i2 number of repeats 00 1 01 10 11 2 4 infinite 2) sound volume smoothing during repeat if "i4" is set to a "1", sound volume during repeat is automatically attenuated from 1 to 1/2, 1/4 and 1/8 (fade-out function). this smoothing, however, is effective only when 2, 4 or infinite is selected for the repeat setting. if infinite is selected, voice is played, remaining at 1/8 sound volume after attenuating from 1, 1/2, 1/4 and to 1/8. if the initial sound volume setting is other than 1, the sound volume attenuates from that value in 1/2 units, stopping at 1/8. 3) setting sound volume voice volume can be changed in four steps if voice is played overlapping in channel synthesis. the sound volume is set at i1 and i0 pins. table 6.6 shows the relationship between i1, i0 pins and sound volume settings. table 6.6 volume attenuation setting i1 i0 volume attenuation 0 0 no attenuation (sound volume is same as voice data) 01 10 11 C6 db attenuation (sound volume is 1/2 of voice data) C12 db attenuation (sound volume is 1/4 of voice data) C18 db attenuation (sound volume is 1/8 of voice data)
86/124 ? semiconductor msm6650 family 7. address data if a phrase is input at i6 to i0 by address data, and if st pulse is then applied, voice playback starts. figure 7.1 shows voice start timing. figure 7.2 and 7.3 show timing when an address, other than a phrase, is input. i6 - i0 (i) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) user phrase oscillation startu p voice end "h" figure 7.1 voice startup timing i6 - i0 (i) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) invalid phrase address "h" oscillation startu p figure 7.2 timing when address, other than a phrase, is input in standby status
87/124 ? semiconductor msm6650 family i6 - i0 (i) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) invalid phrase address "h" "h" 1/2 v dd figure 7.3 timing when address, other than a phrase, is input when aout is 1/2 v dd 8. stop code when i6 to i0 are set to "0000000" during voice playback and a st signal is input, playback stops and aout becomes 1/2 v dd . stop code becomes valid at the leading edge of st (common to parallel and serial inputs). use the stop code only when the busy pin is "l" level. the stop code cannot be used in states of standby mode. note: 1. if the stop code is input while busy is at the "h" level or in standby state (i.e. when aout is gnd), busy goes to the "l" level for approximately 400 ms. 2. if the next data is input within 80 ms after the stop code is input while busy is at the "h" level or in standby state (i.e. when aout is gnd), busy and nar are kept in "l" state and do not return to "h". 3. if the next data is input within 40 m s after the stop code is input while voice is being played, nar is kept in "l" state and does not return to "h". 4. when the phrase address is input during a standby mode and the stop code is input during standby transition, nar cannot go back to a "h". figure 8.1 indicates the timing. i6 - i0 st aout user phrase or silence code "0000000" t bss parameter symbol condition during pop noise occurance stop input time t bss min. 80 unit ms figure 8.1 stop code input timing
88/124 ? semiconductor msm6650 family figure 8.2 shows stop code input timing. note: t ss is also applied for serial input. figure 8.2 stop code input timing (at parallel input) the stop code is a function not to initialize the internal, but to stop a voice. to initialize the internal register, use the reset pin. figure 8.3 stop code input timing (at serial input) i6 - i0 (i) cmd ( i ) st ( i ) busy (o) nar (o) aout (o) user phrase "0000000" "h" voice sto p t ss (note) 1/2 v dd busy (o) aout (o) nar (o) st (i) i6/sd (i) i5/si (i) t ss user phrase voice stop
89/124 ? semiconductor msm6650 family 9. sampling frequency sampling frequencies can be selected for each phrase address of the internal rom. for channel mixing, when channels 1 and 2 are played back at the same time, the channel 1 sampling frequency has priority. when channel 2 is played back by itself (channel 1 is not used) it can be played at a sampling frequency different from channel 1 but only for the first phrase played back by channel 2. after the first phrase playback of channel 2 the second (and all other) phrases will be played back at the channel 1 sample rate. the following 8 frequencies can be selected when creating voice data. 4.0 khz, 5.3 khz, 6.4 khz, 8.0 khz, 10.6 khz, 12.8 khz, 16.0 khz, 32.0 khz 10. voice playback time table 10.1 shows the internal rom configuration. the actual voice data rom area is different from the indicated rom capacity. the voice data management area as shown in table 10.1 is about 6 kbits, and the edit rom area includes 16 kbits. table 10.1 rom configuration voice data management area editing rom area voice data area disabled area use the following formula as a guide to compute voice playback time. playback time = (rom capacity C 16 C6 ) 1024 255/256 ? data rate (kbps) for example, if data was created at a 4.0 khz sampling using msm6652 (288-kbit internal rom), the playback time is (288 C 16 C 6) 1024 255/256 ? 16 (kbps) = 16.9 (sec.)
90/124 ? semiconductor msm6650 family 11. channel status the busy and nar pins output status signals. the busy and nar pins output status signals. the busy pin outputs a h level when the power is turned on and a l level when either channel 1 or channel 2 is playing. the nar (next address request) pin outputs the channel 1 and 2 input status. the ch pin allows the user to see the status of channel 1 and 2 (not channel 1 or channel 2) regardless of the ch pin logic level. this is because both channels are logically anded so their status cannot be determined independently through use of the ch pin. consequently, if the nar status of channel 1 is read using the ch pin after playback has been completed, the status level of channel 2 cannot be accurately determined (e.g., h or l). the nar pin outputs the channel 1 and 2 input status signal (next address request). when this pin is at the "h" level, the st pulse can be input. the channel status is switched by the ch pin. if the ch pin is at the "h" level, the status signal of channel 1 is output, and if ch is "l" level, the status of channel 2 is output. 12. playback method the msm6650 has 3 playback methods: adpcm, pcm and melody play. 12.1 adpcm method with the adpcm (adaptive differential pulse code modulation) method, basic quantization width d is adaptively changed for each sampling, and is encoded to 4-bit data. conversion to adpcm data can be accomplished by the ar761 or ar762 development tool. the adpcm method is used for voice, music, and sound effects. it is considered the best compromise between high quality reproduction and memory usage. 12.2 pcm method the pcm method of the msm6650 uses an 8-bit straight binary format. of the three methods, pcm is the best suited for accurate reproduction of sound effects or waveforms which are pulse shaped or change rapidly (such as high frequency pure tone sine waves). 12.3 melody playback method composed by using these tools. therefore, unique sound can be created.
91/124 ? semiconductor msm6650 family 12.4 data rate of each method the data rate shows the degree of data compression and the data amount to synthesize for 1 second. the data rate is determined by the relationship between the sampling frequency and the data format (in number of bits per sample). the following formula is used. data rate (kbps) = sampling frequency (khz) data format (in number of bits per sample) the data rate of the three methods are compared below when the sampling frequency is 6.4 khz. 1) adpcm method data rate (kbps) = 6.4 (khz) 4 (bits) = 25.6 (kbps) 2) pcm method data rate (kbps) = 6.4 (khz) 8 (bits) = 51.2 (kbps) 3) melody playback method with the melody playback method, the data rate changes depend on the tempo or the kind of note ( ) used. the formula does not determine the data rate changes. the average data rate is 8 kbps. the data rate of the melody playback method is calculated as follows: data rate = number of notes per second data amount per note [kbits] for example, to obtain data rate from the following conditions, f s = 6.4 khz number of notes per second = 1 time [seconds] taken for each thirty-second note = 0.083 sec (tempo = 90) first, obtain the data amount per note with the following expression: data amount per note [kbits] = data amount per thirty-second note [bits per note] 2 time taken for each thirty-second note [sec] f s [hz] 8 [bits] 2 = 0.083 6400 8 2 8.5 [kbits] therefore, when the number of notes per second is 1, the data rate is approximately 8.5 kbps. =
92/124 ? semiconductor msm6650 family 12.5 channel synthesis combinations for each playback method melody and beep tone playback is in channel 1 only. table 12.1 channel synthesis combinations * in the case of channel synthesis, verify the voice quality with the msm6650 evaluation board. the combination of channel 1 and 2 can sometimes cause chipping if either of the channels is recorded at a level which is too high. voice (adpcm) melody beep tone silence pcm 0 db C6 to C18 db C6 to C18 db 0 db channel 1 channel 2 voice (adpcm) melody pcm beep tone silence 0 db C6 to C18 db 0 db C6 to C18 db 0 db C6 to C18 db * * * * * * * * * * * * * * * * * * * *
93/124 ? semiconductor msm6650 family 13. standby conversion if standby conversion yes is selected by command option, the ic enters standby status and stops all operations if the next phrase does not start up within 0.2 sec after playback ends. if restarted it takes about 100 ms until voice starts, since a pop noise countermeasure circuit operates. if standby conversion no is selected by command option, the ic does not enter standby status, even if voice ends, and the output of aout becomes about 1/2 v dd . current is flowing since oscillation is operating. if started up voice starts in about 350 ms. if standby conversion no is selected, it is necessary to input a reset pulse to enter standby status. if a reset pulse is input, a pop noise is generated since the aout output level instantaneously becomes gnd level. busy aout nar st cmd i6-i0 "h" as shown in figure 13.1, when st pulse is input during standby conversion after voice ends, the ic exits from standby status, and the output of aout goes 1/2 v dd . when the output reaches 1/2 v dd , voice synthesis starts. 14. voice output for the voice output pin, a command option can select whether the da converter output is directly output or output through an internal low-pass filter. table 14.1 shows output level of aout pin. table 14.1 output level of aout pin regeneration method condition da converter output lpf output lowest level 0 approx. 0.15 v dd approx. 0.25 v dd approx. 0.25 v dd approx. 0.25 v dd center level approx. 0.5 v dd approx. 0.5 v dd approx. 0.5 v dd approx. 0.5 v dd approx. 0.5 v dd highest level approx. v dd approx. 0.95 v dd approx. 0.75 v dd approx. 0.75 v dd approx. 0.75 v dd adpcm pcm melody beep tone figure 13.1 st pulse input timing during standby conversion
94/124 ? semiconductor msm6650 family 14.1 d/a converter output wave form the output amplitude from the d/a converter becomes a step wave form synchronizing the sampling frequency at a maximum 4095/4096 v dd . if d/a output is selected, it is recommended to externally attach a low-pass filter. since the output impedance of a d/a converter changes between 15 k w to 35 k w , determine the filter constant so that this resistance change does not affect the cutoff frequency of the low-pass filter. 14.2 low-pass filter output the low-pass filter consists of switched capacitors. the attenuation characteristic of the msm6650 family device low-pass filter is C40 db/oct. the cutoff frequency changes depending on the sampling frequency. the cutoff frequency is 0.4 time as low as the sampling frequency. table 14.2 shows the relationship between sampling frequency and cutoff frequency. 0 C20 C40 C60 [db] 100 1k 10k C10 10 C30 C50 C80 C70 20 [ hz ] figure 14.1 lpf frequency characteristies (f s = 8.0 khz) table 14.2 cutoff frequencies of low-pass filter sampling frequency (f sam ) (khz) cutoff frequency (f cut ) (khz) 4.0 5.3 6.4 8.0 10.6 12.8 16.0 32.0 approx. 1.8 approx. 2.6 approx. 2.6 approx. 3.2 approx. 4.2 approx. 5.1 approx. 6.4 approx. 12.8
95/124 ? semiconductor msm6650 family 15. low-pass filter pop noise each device of the msm6650 family contains a "pop" noise killer circuit. however, a low-pass filter selected may cause "pop" noise as the filter output's circled portions of the figure 15.1 change by approx. 0.7 v abruptly. standby conversion time standby conversion time figure 15.1 pop noise of low-pass filter "pop" noise can be reduced by connecting a diode at the aout output (as shown figure 15.2). aout figure 15.2 pop noise killer circuit
96/124 ? semiconductor msm6650 family 16. ceramic oscillation figure 16.1 shows an external circuit diagram using a ceramic oscillator. figure 16.1 external circuit diagram figures 16.2 and 16.3 show external circuit diagrams using a ceramic oscillator, csa4.09 mgu and cst4.09mgwu made by murata mfg. co., ltd. figure 16.2 csa4.09mgu figure 16.3 cst4.09mgwu figure 16.4 shows an extend circuit diagram using a ceramic oscillator, pbrc4.00msa/mks/mws made by kyocera corp. when using an oscillator, 4.00 mhz, playback speed is approximately 2% slower than ar761 and ar762 analysis tools and demonstration board. figure 16.4 prbc4.00msa/mks/mws xt xt c1 c2 xt xt 30 pf 30 pf xt xt internal capacitor xt xt 33 pf 33 pf
97/124 ? semiconductor msm6650 family 17. power supply (for msm6650) the msm6650 should be powered from a single power source to the analog section and digital section separately, as shown below. the following power connections are not permitted. +5 v dv dd av dd dgnd agnd msm6650 dv dd av dd analog supply digital supply power supply dv dd av dd
98/124 ? semiconductor msm6650 family 18. external rom driving timing (for msm6650) the figure 18.1 shows an external rom driving timing during playback at f osc = 4.096 mhz and f s = 8.0 khz. tables 18.1 and 18.2 show f s data and playback method data, respectively. 2 ms (*1) 125 m s 4 m s4 m s4 m s4 m s4 m s 4 ms about 75 ms (*1) 125 m s (*1) 125 m s (*1) 125 m s (*1) 125 m s (*1)(*2) 250 m s st (i) nar (o) ce (o) d0 C d7 (i) 4 m s hereafter, control word & adpcm data address & f s data & playback method data control word adpcm data control word adpcm data 1 byte 255 bytes 1 byte 255 bytes don't care except f s data & playback method data fixed to "00" all data are created using voice analysis edit tools ar76-202 and ar203. *1 changes depending on f s . *2 hereafter, ce , d7-d0 are input or output at intervals of 250 m s or 125 m s. t ced figure 18.1 external rom driving timing
99/124 ? semiconductor msm6650 family table 18.1 f sam data o2 o1 o0 sampling frequency (khz) 0 0 0 8.0 0 0 1 10.7 0 1 0 12.8 0 1 1 32.0 1 0 0 4.0 1 0 1 5.3 1 1 0 6.4 1 1 1 16.0 table 18.2 playback method data o7 o6 playback method 0 0 playback by adpcm 0 1 playback by pcm 1 0 playback by melody
100/124 ? semiconductor msm6650 family application circuits (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx) p1.0 p1.1 p1.2 p2.0 p3.0 reset msm83c154 ch cmd msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 i6/sd i5/si st reset nar xt xt gnd v dd amp port0 port1 aout i4 i1 i0 application circuit in serial input interface mode
101/124 ? semiconductor msm6650 family p2.0 p3.1 p2.2 p2.1 p3.0 reset msm83c154 msm6652/53/54/55/56 msm6652a/53a/54a/55a/56a/58a msm66p54/p56 ch cmd st reset nar xt xt gnd v dd amp p1.6 i6 p1.0 i0 i5 i4 i3 i2 i1 p1.5 p1.4 p1.3 p1.2 p1.1 aout application circuit in parallel input interface mode (msm6652/53/54/55/56-xxx, msm6652a/53a/54a/55a/56a/58a-xxx, msm66p54/p56-xx)
102/124 ? semiconductor msm6650 family application circuit in microcontroller interface mode using four 1-mbit eproms (serial input interface) (msm6650) i5/si ra16 dv dd ch dgnd xt i6/sd nar i0 msm6650 aout cmd i1 i4 rcs ra0 d7 d0 ce ra18 ra17 1b 1a v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 1y3 1y2 1y1 1y0 2g 1g 74hc139 msm27c101 msm27c101 msm27c101 msm27c101 av dd agnd p2.0 p1.0 p1.1 p1.2 p3.0 reset msm83c154 reset st test1 test2 cpu serial xt
103/124 ? semiconductor msm6650 family i2 ra16 dv dd ch rcs dgnd xt xt i1 i0 serial msm6650 aout st cmd ra0 d7 d0 ce ra18 ra17 1b 1a v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 v dd gnd v pp ce oe a16 a0 o7 o0 1y3 1y2 1y1 1y0 2g 1g 74hc139 msm27c101 msm27c101 msm27c101 msm27c101 av dd agnd p2.0 p1.6 p1.5 p1.4 p1.3 p1.2 p1.1 p3.0 p2.1 p2.0 p3.1 p1.0 msm83c154 reset reset test2 test1 i5/si i4 i3 i6/sd nar cpu application circuit in microcontroller interface mode using four 1-mbit eproms (parallel input interface) (msm6650)
104/124 ? semiconductor msm6650 family edit rom edit rom the role of edit rom is to link phrases and build sentences, which makes an external microcontroller unnecessary. the conventional msm6375 family could not link phrases and synthesis channels in standalone mode, but the msm6650 family can using the edit rom. for example: the phrase "today's weather is...." can be used to illustrate the differences between the msm6375 family and msm6650. with the msm6375 family (in stand-alone operation), indi- vidual data must be stored as a phrase in rom (see table1) then for playback each phrase must be addressed individually. example: "today's weather is sunny", and "today's weather is rainy". on the other hand, the msm6650 family has edit rom functions which eliminate the need for an external microcontroller to provide the continuous timing necessary for voice concatenation, as with the msm6375 family. this means that individual phrases or words which are stored in phrase rom can be concatenated in the edit rom and assigned a single address according to their content. this feature allows for efficient use of memory for phrase storage in rom. table 2 shows phrases/words stored in rom and their addresses, table 3 shows how you can combine the phrase/word addresses (up to a maximum of 8) in the edit rom to achieve fully concatenated phrases. conventionally data must be repeatedly stored to phrase rom to vocalize "today's weather is....", but overlapped data is not required as shown in table 2 by using edit rom functions. table 1 conventional phrase rom configuration address [hex] phrase 01 today's weather is sunny. 03 7f 02 today's weather is rainy. today's weather is sunny becoming cloudy, some areas are rainy.
105/124 ? semiconductor msm6650 family table 2 phrase rom configuration table 3 edit rom configuration address [hex] edit content [max. 8 phrases] 01 [01][02][10][03] [01][02][12][03] [01][02][10][21][11][22][13][03] 02 03 7f address [hex] phrase 01 today's 02 03 10 12 13 20 21 7f 22 weather is sunny rainy snowy occasional becoming some areas are 11 cloudy
106/124 ? semiconductor msm6650 family the edit rom makes channel synthesis possible, a feature previously not available in standalone mode with the msm6375 family. with edit rom commands, phrase linking, channel synthesis and "beep" tone or "silence" can be set. a maximum of 8 phrases (16 bytes) per phrase address can be set using the edit rom feature. table 4 shows the edit rom configuration. table 4 edit rom configuration edit data rom edit address rom phrase rom 1 phrase* command 01 phrase phrase address [hex] 01 7f today's 02 03 7e 7f 1 phrase address 2 phrase command 3 phrase command 2 phrase address 3 phrase address 5 phrase address 4 phrase command 4 phrase address 5 phrase command 6 phrase command 6 phrase address 7 phrase command 8 phrase command 7 phrase address 8 phrase address 02 03 04 weather is sunny * the word "phrase" as used here includes any of the following: voice, music, beep tones or silence. edit rom details the "phrase rom" consists of up to a maximum of 127 phrases, the "edit rom" allows you to choose up to any 8 of the 127 phrases in the "phrase rom". the "edit data rom" contains both phrase address and command data. each address in the "edit address rom" can contain up to 8 phrases in the "edit data rom". therefore, each of the 127 edit rom addresses available can represent a single phrase or up to 8 phrases (for concatenation). the phrase rom cannot be directly accessed if the edit rom is used.
107/124 ? semiconductor msm6650 family figure 1 shows the flowchart when creating an edit rom using the ar76-202 development tool. edit start beep tone code set 1. specify frequency (0.5, 1.0, 1.3, 2.0 khz) 2. specify sound volume (1/8, 1/4, 1/3, 1/2) 1. voice 2. beep tone 3. silence voice control code set 1. specify channel 2. specify fadeout 3. specify repeat (1, 2, 4, infinite) 4. specify sound volume (0, C6, C12, C18 db) silence insertion code 1. specify channel beep tone time set specify phrase address silence time set edit end? end code edit no yes 1 2 3 command data input address data input figure 1 edit data rom flowchart
108/124 ? semiconductor msm6650 family 1. edit rom commands table 5 shows the commands that can be set in the edit rom. table 5 list of edit rom commands o7 command description 0 ch after this code is inserted, the beep tone time is set by using o7 to o0. up to 2.1 seconds can be set. ch end code silence insertion code 0 0 1 1 0 1 0 1 1/3 amplitude of channel 1 1/2 amplitude of channel 1 0 0 1 1 0 1 0 1 0.5 1.0 1.3 2.0 voice control code indicates that a piece of edit data is completed. o6 0 1 0 o5 0 1 1 o4 0 sm 0 o3 0 rp1 0 o2 0 rp0 0 o1 0 vl1 0 o0 0 1 bl1 bl0 1/8 amplitude of channel 1 volume bf1 bf0 frequency (khz) the voice control code sets the number of repeats and sound volume. when the number of repeats is set, sound volume smoothing can also be set. volume smoothing during repeating disabled enabled i4 (sm) 0 1 number of repeats 1 2 4 infinite i3(rp1) 0 0 1 1 i2(rp0) 0 1 0 1 attenuation 0 db C6 db C12 db C18 db beep tone code 1/4 amplitude of channel 1 i1(vl1) 0 0 1 1 i0(vl0) 0 1 0 1 after this code is inserted, the silence time is set using bits o7 to o0. up to 2.1 seconds can be set. silence is inserted into the channel designated by ch. ch = "1" ? channel 1 ch = "0" ? channel 2 1 0 0 bl1 bl0 bf1 bf0 vl0 0 silence is inserted into the channel designated by ch. ch = "1" ? channel 1 ch = "0" ? channel 2 each of the edit rom commands in table 5 are explained below.
109/124 ? semiconductor msm6650 family 1.1 end code the end code is used at the completion of a phrase. the msm6650 family recognizes the end code which is necessary when the edit rom contains only a single phrase. when the maximum number of phrases is selected (8) the end code is unnecessary. 1.2 silence insertion code silence insertion code inserts silence in the specified channel, reducing voice data. o7 o6 o5 o4 o3 o2 o1 o0 ch0100000 the channel for silence insertion is specified in the command data, while the silence time is set in the address data. command data bit o7 (ch) specifies into which channel silence will be inserted, a "1" in data bit o7 selects channel 1 while a "0" selects channel 2. silence time is set at the address settings of phrases shown in table 4. minimum silence time .... 16.384 ms maximum silence time .... 2.1 sec. the formula to set the silence time is shown below. t mu = (2 6 (o6) + 2 5 (o5) + 2 4 (o4) + 2 3 (o3) + 2 2 (o2) + 2 1 (o1) + 2 0 (o0)) 16.384 ms table 6 edit data example of silence insertion coding o7 o6 o5 o4 o3 o2 o1 o0 10100000 00011000 00000000 1st byte 2nd byte 3rd byte silence insertion code silence time end code 1.3 beep tone code the beep tone code produces a beep tone from an internal circuit which is independent of the adpcm circuitry. the sound volume and frequency of a beep tone is set in command data, while the playback time of a beep tone is set in the address data. the beep tone can be set only in channel 1. the sound volume is set at data bits o3, o2 and the frequency is set at data bits o1, o0. o7 o6 o5 o4 o3 o2 o1 o0 1 1 0 0 bl1 bl0 bf1 bf0
110/124 ? semiconductor msm6650 family tables 7 and 8 show the sound volumes and the frequencies that can be set. o3 o2 sound volume 0 0 1/8 amplitude sound volume of channel 1 01 10 11 1/4 amplitude sound volume of channel 1 1/3 amplitude sound volume of channel 1 1/2 amplitude sound volume of shannel 1 o1 o0 frequency 0 0 0.5 khz 01 10 11 1.0 khz 1.3 khz 2.0 khz table 7 sound volume settings table 8 frequency settings the beep tone time is set in the phrase address setting of the edit data rom shown in table 4. minimum beep tone time ....... 16.384 ms maximum beep tone time ...... 2.1 sec. the formula to set a beep tone time is shown below. t be = (2 6 (o6) + 2 5 (o5) + 2 4 (o4) + 2 3 (o3) + 2 2 (o2) + 2 1 (o1) + 2 0 (o0)) 16.384 ms table 9 edit data example of beep tone coding o7 o6 o5 o4 o3 o2 o1 o0 11001101 00011000 00000000 1st byte 2nd byte 3rd byte beep tone code beep tone time end code for example, if edit data is set as in table 9, a 1.0 khz beep tone is played back at a 1/2 amplitude sound volume in channel 1 for 393 ms. 1.4 voice control code the voice control code sets repeat and sound volume. o7 o6 o5 o4 o3 o2 o1 o0 ch 1 1 sm rp1 rp0 vl1 vl0 the channel is set with data bits "o7". if bit "o7" is "h", channel 1 is selected, if "l" channel 2 is set.the voice control condition of each channel is set using bits o0-o4.
111/124 ? semiconductor msm6650 family (1) setting the number of repeats the number of repeats is set with data bits o3 and o2, and can be selected from 4 types: 1, 2, 4 and infinite. if infinite is selected, repeat can be stopped by switching to another phrase. table 10 shows the relationship between o3, o2 and the number of repeats. table 10 number of repeats settings o3 o2 number of repeats 00 1 01 10 11 2 4 infinite (2) sound volume smoothing during repeat if data bit "o4" is set to a "1", sound volume during repeat is attenuated from 1 to 1/2, 1/4 and 1/8. this smoothing, however, is effective only when 2, 4 or infinite is selected for the repeat setting. if infinite is selected, voice is played, remaining at 1/8 sound volume after attenuating from 1 to 1/2, 1/4 and 1/8. if the initial sound volume setting is other than 1, the sound volume attenuates from that value in 1/2 units, stopping at 1/8. (3) setting sound volume voice volume can be changed in 4 steps if voice playback overlaps during channel mixing. the sound volume is set with data bits o1 and o0. table 11 shows the corresponding data and attenuation values. table 11 volume attenuation setting o1 o0 volume attenuation 0 0 no attenuation (sound volume is same as voice data) 01 10 11 C6 db attenuation (sound volume is 1/2 of voice data) C12 db attenuaiton (sound volume is 1/4 of voice data) C18 db attenuaiton (sound volume is 1/8 of voice data)
112/124 ? semiconductor msm6650 family 2. pcm playback using the edit rom for pcm playback, edit data is set together with the voice control data. items which can be set in the voice control code include (channel, sound volume smoothing during repeat, number of repeats, and sound volume). 3. melody playback using the edit rom for melody playback, edit data is set together with the voice control data. channels however cannot be set. channel 1 is fixed. channel 2 mixing of melodies is not possible. 4. random playback using the edit rom if the rnd pin is used during random playback, the 1st edit phrase (which consists of an edit data rom sequence up to 8 phrases/16 bytes) is played and the random playback of the 2nd edit phrase then starts random play continuously. random play requires the channel setting for the 1st and 2nd edit phrases to be the same. random play cannot be used during channel 2 play or echo play without the use of the silence insertion technique shown in figure 10 item (2). figure 2 item (1) shows the overlapping of the 2nd edit phrase in channel 1 with the echo playback of channel 2. item (2) shows how silence is inserted after the 1st edit phrase in channel 1 to avoid overlapping of the 2nd edit phrase with channel 2 playback. (1) (2) channel 1 channel 2 channel 1 channel 2 1st edit phrase 2nd edit phrase "today's" "weather" "today's" silence 1st edit phrase 2nd edit phrase "today's" silence "weather" "today's" silence figure 2 example of random vocalization timing
113/124 ? semiconductor msm6650 family 5. channel 2 mixing function in the edit rom this function overlaps 2 phrases. by using edit rom, it is easy to echo a phrase (echo play) and to a phrase with bgm (background music, in channel 2). 5.1 echo playback echo playback delays and overlaps the phrase played in channel 1 at C6 db attenuation (1/2 amplitude of channel 1) in channel 2. echo playback of a single phrase using address [02] of the phrase rom, "weather", an example is shown with echo of a single phrase. table 12 edit data example of echo playback of a single phrase if edit data is set as in table 12, "weather" is played in channel 1, and is overlapped during playback from channel 2 at C6 db attenuated sound volume 98.3 ms after the start of channel 1 play. when two phrases overlap set the attenuation of the voice control command with attention to sound volume to prevent clipping. be aware that the silence time is an element that influences the echo quality. set the silence time so that the desired echo is created. o7 o6 o5 o4 o3 o2 o1 o0 1 1st byte voice control code (ch1 select, repeat, C6 db attenuation) 2nd byte 3rd byte 4th byte 5th byte 6th byte 7th byte 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 1 0 0 silence insertion code (ch2 select) phrase address (02h "weather") silence time (98.3 ms) voice control code (ch2 select, repeat, C12 db attenuaiton) phrase address (02h "weather") end code
114/124 ? semiconductor msm6650 family when using echo play set the number of repeats of the voice control command to 1. if 2, 4 or infinite is set, timing becomes as shown in figure 3. (1) number of repeats: 1 (2) number of repeats: 2 channel 1 channel 2 "weather" "weather" "weather" "weather" silence (3) number of repeats: 4 channel 1 channel 2 "weather" "weather"" "weather"" "weather"" "weather"" "weather"" silence channel 1 channel 2 "weather" "weather" "weather" channel 1 has infinite playback channel 2 does not p la y (4) number of repeats: infinite figure 3 echo playback timing using repeated playback the echo playback timing, during repeated play which is assigned with the voice control command for an edit data phrase, is explained below. channel 1 channel 2 silence "weather" "weather"
115/124 ? semiconductor msm6650 family (1) when the number of repeats is set to 1 when the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 1st phrase ends. if the channel of the next phrase is different (channel 2), then channel synthesis (playback of channels 1 and 2) begins at the start of playback. (2) when the number of repeats is set to 2 when the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 2nd phrase ends. if the channel of the next phrase is different (channel 2), then channel synthesis at the start of the second phrase playback. echo does not occur under these conditions because channels 1 and 2 are played simultaneously. a silence insertion code must be applied to channel 2 for echo to occur, playback in channel 2 is then delayed with respect to channel 1 which causes echo (see figure 3). the amount of echo depends on the duration of the silence in channel 2. (3) when the number of repeats is set to 4 when the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 4th phrase ends. if the channel of the next phrase is different (channel 2), then channel synthesis (playback of channels 1 and 2) begins at the start of the 4th phrase playback. echo does not occur under these conditions because channels 1 and 2 are played simultaneously. a silence insertion code must be applied to channel 2 for echo to occur, playback in channel 2 is then delayed with respect to channel 1 which causes echo (see figure 3). the amount of echo depends on the duration of the silence in channel 2. (4) when the number of repeats is set to infinite the next phrase becomes invalid and is not played regardless of the channel specification (see figure 3 (4)).
116/124 ? semiconductor msm6650 family echo playback of multiple phrases a maximum of eight phrases (16 bytes) can be set to the edit data rom. up to three phrases can be set for echo play with 16 bytes. the phrase rom should be set so that the number of phrases does not exceed four. using "today's", "weather" and "is" of the phrase rom in table 2 as an example, table 13 shows echo playback of three phrases. figure 4 shows the playback timing. table 13 edit data example C three phrase echo playback channel 1 channel 2 "today's" "weather" "is" "sunny" silence "today's" "weather" "is" figure 4 playback timing of three phrases with echo o7 o6 o5 o4 o3 o2 o1 o0 0 1 1st byte voice control code (ch1 select, repeat once, C6 db attenuation) 2nd byte 3rd byte 4th byte 5th byte 6th byte 7th byte 8th byte 9th byte 10th byte 11th byte 12th byte 13th byte 14th byte 15th byte 16th byte 11000 1 00000001 00100000 000 00110 011000 0 1 00000001 0 111000 1 000 000 0 1 011000 0 1 011000 0 1 000000 0 1 111000 1 0 000100 0 0 000100 0 0 111000 1 1 000000 1 1 phrase address (02h "weather") phrase address (01h "today's") voice control code (ch2 select, repeat once, C12 db attenuation) phrase address (02h "weather") silence time (98.3 ms) silence insertion code (ch2 select) voice control code (ch1 select, repeat once, C6 db attenuation) voice control code (ch2 select, repeat once, C12 db attenuation) phrase address (01h "today's") phrase address (03h "sunny") voice control code (ch1 select, repeat once, C6 db attenuation) phrase address (10h "is") voice control code (ch2 select repeat once, C12 db attenuation) phrase address (10h "is") voice control code (ch1 select, repeat once, C6 db attenuation)
117/124 ? semiconductor msm6650 family for the echo playback of multiple phrases, the sampling frequency of each phrase must be the same. if a phrase with a different sampling frequency is mixed, the voice of channel 2(echo) will be played fast or slow because the sampling frequency of channel has priority. figure 5 shows the timing. channel 1 channel 2 f s = 6.4 khz f s = 8 khz f s = 6.4 khz "today's" "weather" "is" silence fast pla y back slow pla y back "is" "today's" "weather" figure 5 echo playback timing with different sampling frequencies echo playback of a single phrase within a phrase string table14 shows an edit data example to apply echo to "is" in the four phrases of "today's", "weather", "is" and "sunny". table 14 edit data example of a single phrase within a phrase string o7 o6 o5 o4 o3 o2 o1 o0 1 0 1st byte voice control code (ch1 select, repeat once, no attenuation) 2nd byte 3rd byte 4th byte 5th byte 6th byte 7th byte 8th byte 9th byte 10th byte 11th byte 12th byte 13th byte 11 0000 00000 00 1 0010000 0 10000 01 1 10000 11 0 00001 00 0 10000 11 0 01000 00 0 10000 01 1 01000 00 0 10000 11 0 00001 00 1 00000 00 0 phrase address (01h "today's") silence insertion code (ch2 select) silence time (1.59 sec) voice control code (ch1 select, repeat once, no attenuation) phrase address (02h "weather") voice control code (ch1 select, repeat once, no attenuation) phrase address (10h "is") voice control code (ch2 select, repeat once, C6 db attenuation) phrase address (10h "is") voice control code (ch1 select, repeat once, no attenuation) phrase address (03h "sunny") end code
118/124 ? semiconductor msm6650 family channel 1 channel 2 1.5 sec 0.09 sec "today's" "weather" "is" "sunny" silence "is" figure 6 playback timing using table 14 edit data as shown by the timing in figure 6, "is" is echoed by setting the silence time to delay playback of channel 2 echo. while channel 1 plays four consecutive phrases, the silence time has been set so that channel 2 play is delayed until the selected phrase in channel 1 can be echoed. if the silence time exceeds 2.1 sec, it is necessary to add a silence insertion setting to 2 bytes of the edit data. a maximum of 6 phrases are possible if the silence insertion setting is 2 bytes. 5.2 two-channel playback two-channel play uses pcm, memory and adpcm methods. channel mixing is possible with all combinations except melody play/melody play (in channel 2). melody play is in channel 1 only. the sampling frequency of phrases which overlap must be the same. figures 7 to 10 show 2 channel playback timing. channel 1 channel 2 1st phrase melody tone "today's" "weather" "is" "sunny" 2nd phrase 3rd phrase 4th phrase 5th phrase figure 7 timing of four phrase channel mixing with a melody tone as bgm (background music) channel 1 channel 2 1st phrase 4th phrase melody tone melody tone "today's" "weather" "is" "sunny" 2nd phrase 3rd phrase 5th phrase 6th phrase figure 8 timing of four phrase channel mixing with a melody tone for 1st and 4th phrases as bgm (background music)
119/124 ? semiconductor msm6650 family channel 1 channel 2 1st phrase pcm tone (a) pcm tone (b) pcm tone (b) pcm tone (b) pcm tone (b) 2nd phrase figure 9 channel mixing between pcm main melody tone (a) and pcm rhythm tone (b) with 4 repeats channel 1 channel 2 1st phrase 3rd phrase pcm tone (a) pcm tone (b) pcm tone (c) pcm tone (c) pcm tone (d) pcm tone (d) 2nd phrase 4th phrase figure 10 channel synthesis between pcm main melody tone (a) (b) and pcm rhythm tone (c) (d) with 2 repeats
120/124 ? semiconductor msm6650 family (unit : mm) package dimensions dip18-p-300-2.54 package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 1.30 typ.
121/124 ? semiconductor msm6650 family (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). sop24-p-430-1.27-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.58 typ. mirror finish
122/124 ? semiconductor msm6650 family (unit : mm) dip20-p-300-2.54-w1 package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 1.50 typ.
123/124 ? semiconductor msm6650 family (unit : mm) notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). qfp64-p-1420-1.00-bk package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 1.25 typ. mirror finish
124/124 ? semiconductor msm6650 family (unit : mm) sdip64-p-750-1.78 package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin cu alloy solder plating 5 m m or more 8.70 typ.

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